Method for driving liquid crystal display panel and liquid crystal display device

• US 20030193464A1
• Filed: 01/31/2003
• Published: 10/16/2003
• Est. Priority Date: 12/27/2000
• Status: Abandoned Application

• Current Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Original Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Inventors: Takahara, Hiroshi, Tsuge, Hitoshi, Yamano, Atsuhiro
• Application Number:
  US10/333,904
• Publication Number:
  US 20030193464A1
• Time in Patent Office: Days
• US Class Current: 345/89
• CPC Class Codes: G09G 2320/0247 Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes
• CPC Class Codes: G09G 3/3625 using active addressing

Abstract

In order to provide, when a multi-line selection (MLS) drive method for simultaneously selecting a plurality of scanning electrodes is applied to a liquid crystal display panel, a frame rate control (FRC) gradation display method in which the number of gradations to be displayed is increased without increasing a frame rate and circuit scales, a gradation register for storing a gradation pattern for displaying an ON state and an OFF state at each gradation level, a gradation control circuit for performing a shift arithmetic operation of the gradation pattern and a gradation selecting circuit disposed on each signal electrode are provided so as to cause the gradation control circuit to perform a shift operation of the gradation pattern of the gradation register for each frame synchronously with a vertical synchronous signal, for each line synchronously with a horizontal synchronous signal and for each sub-frame such that the gradation display is performed.

Claims

1. A method of driving, by a multi-line selection (MLS) drive method for simultaneously selecting a plurality of L scanning electrodes, a liquid crystal display panel in which one frame is constituted by L sub-frames, comprising the steps of:

providing a gradation register for storing a gradation pattern for displaying an ON state and an OFF state at each gradation level so as to perform gradation display by a frame rate control (FRC) method, a gradation control circuit for performing a shift operation of the gradation pattern of the gradation register and a gradation selecting circuit disposed on each signal electrode so as to cause the gradation control circuit to perform a shift operation of the gradation pattern of the gradation register for each frame synchronously with a first synchronous signal, for each line synchronously with a second synchronous signal and for each sub-frame such that the gradation display is performed.

2. A method as claimed in claim 1, wherein (L−

1) shift amounts for each sub-frame are set to an identical value at each gradation level.

3. A method as claimed in claim 2, wherein a shift amount for each frame of the gradation pattern at each gradation level, a shift amount for each line and the identical (L−

1) shift amounts for each sub-frame at each gradation level vary according to the frames.

4. A method as claimed in claim 3, wherein a shift amount for each frame of the gradation pattern at each gradation level of red, green and blue, the shift amount for each line and the identical (L−

1) shift amounts for each sub-frame at each gradation level are made variable.

5. A method as claimed in claim 2, wherein a shift amount for each frame is set to a further identical value at each gradation level and the identical value of the (L−

1) shift amounts for each sub-frame at each gradation level is set to the further identical value of the shift amount for each frame at each gradation level or zero.

6. A method as claimed in claim 5, wherein the gradation pattern is formed by a unit of 15 frames from 0/15 to 15/15 and a shift amount for each frame is set to one of 1, 2, 4, 7, 8, 11, 13 and 14 at each gradation level;

wherein the identical value of the (L−

1) shift amounts for each sub-frame at each gradation level is set to the further identical value of the shift amount for each frame at each gradation level or zero such that 16 gradations of 4096 colors are displayed.

7. A method as claimed in claim 5, wherein a least common multiple of the number of the frames constituting the gradation pattern is 24, the shift amount for each frame at each gradation level is set to 5 and the identical value of the (L−

1) shift amounts for each sub-frame at each gradation level is set to 5 or 0 such that 16 gradations of 4096 colors are displayed.

8. A method as claimed in claim 7, wherein the gradation pattern for displaying the ON state and the OFF state of the 16 gradation levels has values of 0, 1/12, 1/8, 1/6, 1/4, 1/3, 3/8, 5/12, 1/2, 7/12, 2/3, 3/4, 5/6, 7/8, 11/12 and 1, the shift amount for each frame at each gradation level is set to 5 and the identical value of the (L−

1) shift amounts for each sub-frame at each gradation level is set to 5 or 0 such that 16 gradations of 4096 colors are displayed.

9. A method as claimed in claim 8, wherein one frame is constituted by four sub-frames in a multi-line selection 4 (MLS4) drive method for simultaneously selecting four scanning electrodes and a combination of shift amounts from the first sub-frame to the second sub-frame, from the second sub-frame to the third sub-frame and from the third sub-frame to the fourth sub-frame is set to (5, 5, 5), (5, 5, 0), (5, 0, 5), (0, 5, 5), (5, 0, 0), (0, 5, 0) or (0, 0, 5) such that 16 gradations of 4096 colors are displayed.

10. A method as claimed in claim 9, wherein the liquid crystal display panel is divided into four blocks in a direction of signal lines in order to set an optimum shift amount for each line at the time of display of still images;

wherein by stopping, in a state where a pattern having gradation changing from 0 to 15 at an interval of one dot in a direction of scanning lines is displayed in the first block, a pattern having gradation changing from 0 to 15 at an interval of two dots in the direction of the scanning lines is displayed in the second block, a pattern having gradation changing from 0 to 15 at an interval of four dots in the direction of the scanning lines is displayed in the third block and a pattern having gradation changing from 0 to 15 at an interval of eight dots in the direction of the scanning lines is displayed in the fourth block, frame shift at a gradation level for setting the shift amount for each line, the shift amount f-or each line at each gradation level is set to a value leading to disappearance of vertical stripes due to interference such that 16 gradations of 4096 colors are displayed.

11. A method as claimed in claim 9, wherein the liquid crystal display panel is divided into four blocks in a direction of signal lines in order to set an optimum shift amount for each line at the time of display of moving pictures;

wherein by stopping, in a state where a pattern having gradation changing from 0 to 15 at an interval of one dot in a direction of scanning lines is displayed in the first block, a pattern having gradation changing from 0 to 15 at an interval of two dots in the direction of the scanning lines is displayed in the second block, a pattern having gradation changing from 0 to 15 at an interval of four dots in the direction of the scanning lines is displayed in the third block and a pattern having gradation changing from 0 to 15 at an interval of eight dots in the direction of the scanning lines is displayed in the fourth block and display is shifted in a direction perpendicular to the scanning lines at an interval of frames equal in number to a least common multiple of the numbers of the frames each forming the gradation pattern at each gradation level, frame shift at a gradation level for setting the shift amount for each line, the shift amount for each line at each gradation level is set to a value leading to disappearance of vertical stripes due to interference such that 16 gradations of 4096 colors are displayed.

12. A liquid crystal display device in which a plurality of L scanning electrodes are selected simultaneously and one frame is constituted by L sub-frames, comprising:

a gradation register for storing a gradation pattern for displaying an ON state and an OFF state at each gradation level;

a gradation control circuit for performing a shift operation of the gradation pattern of the gradation register; and

a gradation selecting circuit which is provided on each signal electrode;

wherein the gradation control circuit performs a shift operation. of the gradation pattern of the gradation register for each frame synchronously with a first synchronous signal, for each line synchronously with a second synchronous signal and for each sub-frame.

13. A liquid crystal display device as claimed in claim 12, wherein a first drive circuit for driving the scanning electrodes an a second drive circuit for driving the signal lines are formed into a one-chip driver IC.