Adaptive direct conversion receiver

• US 20030198306A1
• Filed: 04/23/2002
• Published: 10/23/2003
• Est. Priority Date: 04/23/2002
• Status: Active Grant

• Current Assignee: Kyocera Corporation
• Original Assignee: Kyocera Wireless Corporation (Kyocera Corporation)
• Inventors: Forrester, Tim
• Granted Patent: US 7,072,424 B2
• Time in Patent Office: Days
• US Class Current: 375/345
• CPC Class Codes: H04B 1/109 by improving strong signal performance of the receiver when strong unwanted signals are present at the receiver input
• CPC Class Codes: H04B 1/30 for homodyne or synchrodyne receivers demodulator circuits H03D1/22
• CPC Class Codes: H04L 1/0001 Systems modifying transmission characteristics according to link quality, e.g. power backoff adaptive data allocation for multicarrier modulation H04L5/0044; controlling transmission power for radio systems H04W52/04

Abstract

A method and apparatus is disclosed for improving performance of a communication receiver. In one embodiment a method and apparatus is configured to process a communication signal by adjusting the amplification level of the signal and monitoring for a corresponding change in the error rate which indicates the increased error rate is caused by an interference or jammer signal. A method and apparatus is disclosed which reduces the error rate if the error rate can be reduced by activating error reducing operations. In one embodiment current flow to a mixer is increased to reduce the error rate. The apparatus may be further configured to periodically monitor the error rate during periods when error reducing operations are active. If the monitoring determines the error rate has sufficiently decreased then the receiver operation is restored to normal operation. Phase offset adjustment may also occur to further reduce the error rate.

Claims

1. A method for determining a cause of a high error rate in a receiver configured to receive and process a signal, the method comprising:

calculating an error rate at a first time, the error rate associated with a signal received by the receiver;

adjusting an amplification level applied to the signal;

demodulating the signal to create a baseband signal;

calculating an error rate at a second time, wherein the error rate is derived from the signal at a second time; and

comparing the error rate at the first time to the error rate at the second time.

2. The method of claim 1, wherein adjusting an amplification level applied to the signal comprises increasing the amplification level of a low noise amplifier.

3. The method of claim 1, further comprising:

increasing the amplification level applied to the signal; and

decreasing the amplification level applied to the baseband signal.

4. The method of claim 1, further including determining that the high error rate is caused by an interference signal if the error rate at the second time is different than the error rate at the first time.

5. A method for reducing a rate of error in an output of a receiver comprising:

calculating a rate of error associated with a received signal at a first time;

comparing the rate of error at a first time to a first threshold rate of error;

activating an error reduction operation to reduce the rate of error;

calculating a rate of error associated with a received signal at a second time;

comparing the rate of error at a second time to a second threshold rate of error; and

deactivating the error reduction operation if the comparing the rate of error at a second time to a second threshold rate of error reveals that the rate of error at a second time is less than the second threshold rate of error.

6. The method of claim 5, wherein the error reduction operation comprises increasing current provided to a mixer in the receiver.

7. The method of claim 5, wherein the second threshold rate for error is less than the first threshold rate of error.

8. The method of claim 5, further including adjusting phase offset between quadrature separated signals if the comparing the rate of error at a second time reveals that the second rate of error is greater than the second threshold rate of error.

9. The method of claim 5, wherein activating an error reduction operation occurs if the comparing the rate of error at a first time to a first threshold rate of error reveals that the rate of error at the first time is larger than the first threshold rate of error.

10. The method of claim 5, wherein activating an error reduction operation occurs responsive to, after adjusting an amplification level of the received signal, the error rate changes.

11. A system for reducing the bit error rate in a wireless receiver comprising:

a high frequency amplifier configured to amplify a received signal;

a mixer configured to demodulate the amplified signal to create a baseband signal;

a sampling unit configured to convert the adjusted baseband signal into a digital signal;

an error detection unit configured to process the digital signal to determine an error rate; and

a controller configured to compare the error rate to one or more threshold values and selectively increase a current level provided to the mixer based on the comparison.

12. The system of claim 11, wherein the controller is further configured to increase current flow to the mixer if, and only if, a change in amplification level of the high frequency amplifier results in a change in the error rate.

13. The system of claim 11, further including an automatic gain control unit configured to adjust an amplitude of the baseband signal provided to the sampling unit in response to a change in amplification level of the high frequency amplifier.

14. The system of claim 11, wherein the controller comprises a digital signal processor.

15. The system of claim 11, wherein the wireless receiver comprises a direct conversion receiver.

16. A system for reducing the error rate in a received signal in a direct conversion receiver comprising:

a low noise amplifiers configured to adjust the amplitude of a high frequency signal;

an adjustable current mixer configured to convert the high frequency signal to a baseband frequency signal;

a processor configured to;

calculate an error rate associated with the received signal;

compare the error rate to a threshold value; and

transmit a control signal to the adjustable current mixer to thereby increase the current level provided to the adjustable current mixer if the comparison reveals that the error rate is greater than the threshold value.

17. The system of claim 16, wherein the processor comprises a digital signal processor.

18. The system of claim 16, wherein the low noise amplifier comprise an adjustable gain low noise amplifier and wherein the processor is further configured to:

adjust the gain of the low noise amplifier;

calculate the error rate associated with the received signal; and

transmit a control signal to the adjustable current mixer to increase current to the adjustable current mixer if the error rate changed as a result of the adjustment of the gain.

19. The system of claim 16, wherein the direct conversion receiver further includes a splitter configure to split the received signal into two or more phase-offset signals and the processor is further configured to adjust the phase offset of the two or more phase offset signals when an error rate is greater than the threshold value.

20. An apparatus for determining if an increase in an error rate of a received signal is caused by an interference signal, the apparatus comprising:

an amplifier configured to amplify the received signal;

an amplifier control module in communication with the amplifier and configured to change the level of amplification performed by the amplifier;

an error detection module configured to calculate the error rate of the received signal;

a controller configured to;

receive the error rate from the error detection module during a first period and a second period, wherein the amplification control module changes the level of amplification at the first period as compared to the second period; and

compare the error rate calculated during the first period to the error rate calculated during the second period to determine if the increase in the error rate is from an interference signal.

21. The apparatus of claim 20, wherein the interference signal comprises a second order blocking product.

22. The apparatus of claim 20, wherein the controller comprises a digital signal processor.

23. The apparatus of claim 20, further including a demodulator control unit configured to increase current flow to a demodulator during periods when the error rate of the received signal is caused by an interference signal.

24. The apparatus of claim 23, wherein the apparatus operates in conjunction with a direct conversion receiver to reduce the bit error rate of the direct conversion receiver.

25. A computer program product comprising a computer useable medium having computer program logic recorded thereon for error rate analysis and reduction, comprising:

computer program code logic configured to analyze a signal to determine at a first time a rate of error associated with the signal;

computer program code logic configured to modify a gain level applied to the signal;

computer program control logic configured to analyze the signal to determine at a second time after gain level modification a rate of error associated with the signal; and

computer program control logic configured to increase power provided to a demodulator if the error rate changed as a result of the modification to the gain level.

26. The computer readable medium of claim 25, wherein the computer program code logic configured to modify a gain level comprises computer program code logic configured to modify a gain level applied to the signal by a low noise amplifier.

27. The computer readable medium of claim 25, wherein the computer program code logic configured to increase power provided to a demodulator comprises computer program code logic configured to increase current consumption by a mixer to reduce second order blocking products.

28. The computer readable medium of claim 25, further including computer program code logic configured to monitor the error rate and reduce the power provided to the demodulator if the monitoring reveals a reduction in the error rate to an acceptable level.

29. A system for improving receiver performance comprising:

means for determining an error rate associated with a signal received by a receiver;

means for comparing the error rate to a threshold value;

means for activating an error reducing operation based on the comparison of the error rate to the threshold value;

means for monitoring the error rate for a reduction in the error rate; and

means for deactivating the error reducing operation based on the means for monitoring.

30. The system of claim 29, wherein the means for determining an error rate comprises a digital signal processor.

31. The system of claim 29, wherein the means for monitoring comprises a digital signal processor configured to continually or periodically compare the error rate to a threshold value when the error reducing operation is active.