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Method and apparatus for increasing flash ROM programming performance in a multiple processor computer system

  • US 20030199994A1
  • Filed: 04/23/2002
  • Published: 10/23/2003
  • Est. Priority Date: 04/23/2002
  • Status: Active Grant
First Claim
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1. A computer system, comprising:

  • a processor complex having a plurality of processors;

    a system memory accessible by at least one of the plurality of processors;

    a system BIOS adapted to rendezvous the plurality of processors to a common memory location in the system memory and designate one of the processors as a bootstrap processor;

    a non-volatile memory device adapted to be accessible to the plurality of processors;

    wherein the bootstrap processor is adapted to;

    program the non-volatile memory device by partitioning an image to be programmed into the non-volatile memory device into segments;

    divide the segments amongst one or more of the plurality of processors, each of the one or more of the plurality of processors being assigned to program a portion of the nonvolatile memory device corresponding to its respective segment; and

    monitor the progress of the one or more of the plurality of processors to determine when the programming of the non-volatile memory device is completed.

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