Dynamic bias controller for power amplifier circuits

• US 20030201834A1
• Filed: 04/30/2003
• Published: 10/30/2003
• Est. Priority Date: 02/21/2002
• Status: Active Grant

• Current Assignee: Unwired Planet LLC (JP Morgan Chase & Co)
• Original Assignee: Ericsson, Inc. (Telefonaktiebolaget LM Ericsson)
• Inventors: Pehlke, David R,
• Granted Patent: US 6,765,443 B2
• Time in Patent Office: Days
• US Class Current: 330/296
• CPC Class Codes: H03F 1/025 by using a signal derived from the input signal
• CPC Class Codes: H03F 1/0272 by using a signal derived from the output signal
• CPC Class Codes: H03F 1/301 in MOSFET amplifiers H03F1/303, H03F1/305, H03F1/308 take precedence
• CPC Class Codes: H03F 2200/108 A coil being added in the drain circuit of a FET amplifier stage, e.g. for noise reducing purposes
• CPC Class Codes: H03F 2200/195 A hybrid coupler being used as power measuring circuit at the input of an amplifier circuit
• CPC Class Codes: H03F 2200/451 the amplifier being a radio frequency amplifier
• CPC Class Codes: H03F 2200/462 the current being sensed
• CPC Class Codes: H03F 2200/481 A resistor being used as sensor
• CPC Class Codes: H03F 2200/483 A shunting switch being paralleled to the sensor
• CPC Class Codes: H03F 2200/504 the supply voltage or current being continuously controlled by a controlling signal, e.g. the controlling signal of a transistor implemented as variable resistor in a supply path for, an IC-block showed amplifier

Abstract

A bias controller sets the quiescent current of a power amplifier to a desired value by dynamically adjusting the power amplifier bias voltage. Using closed-loop control, the bias controller sets the bias voltage to whatever value is needed despite circuit component variations and temperature effects. Operation of the bias controller complements dynamic bias voltage adjustment in advance of transmit operations, such as in advance of a transmit burst. In a first state, where the power amplifier is in a quiescent condition, the bias controller adjusts bias voltage to set the desired quiescent current by detecting the supply current into the power amplifier. The bias controller then transitions to a second state, where it maintains the adjusted bias voltage irrespective of amplifier supply current. Despite its ability to sense supply current into the power amplifier, the bias controller'"'"'s configurations avoid dissipative current sensing during normal operation of the power amplifier.

Claims

1. A bias controller to generate a bias voltage signal that sets a quiescent current value of a supply current into a power amplifier circuit, the bias controller comprising:

a current detector to generate a detection signal responsive to the supply current; and

a closed-loop control circuit to adjust the bias voltage responsive to the detection signal in a first state such that supply current is set substantially equal to a desired quiescent current value, and to maintain the bias voltage during a second state irrespective of the detection signal.

2. The bias controller of claim 1, wherein the closed-loop control circuit comprises:

an amplifier circuit to generate an error signal responsive to a difference between the detection signal and a reference signal representative of the desired quiescent current value; and

a track-and-hold circuit to generate the bias voltage as a function of the error signal in the first state, and to maintain the bias voltage irrespective of the error signal in the second state.

3. The bias controller of claim 2, wherein the track-and-hold circuit comprises:

an input storage element coupled to an output of the amplifier circuit in the first state and decoupled in the second state, such that the input storage element tracks the error signal in the first state and holds a last value of the error signal in the second state; and

a buffer amplifier coupled to the input storage element to generate the bias voltage based on the error signal in the first state, and based on the last value of the error signal in the second state.

4. The bias controller of claim 3, wherein the buffer amplifier comprises a voltage follower circuit with a desired signal gain.

5. The bias controller of claim 4, wherein the buffer amplifier comprises a unity-gain voltage follower.

6. The bias controller of claim 4, wherein the track-and-hold circuit further comprises a coupling switch to selectively couple and decouple the input storage element from the error amplifier responsive to a bias adjust control signal.

7. The bias controller of claim 6, wherein the input storage element comprises a capacitor coupled at a first end to the coupling switch and to an input of the buffer amplifier, and coupled to a signal ground node at a second end, such that a capacitor voltage of the capacitor follows the error signal when coupled to the error amplifier, and remains substantially at the last value of the error signal when decoupled from the error amplifier.

8. The bias controller of claim 1, wherein a supply input of the power amplifier is coupled to a first supply voltage through a measurement path including the current detector, and to a second voltage supply through a primary path bypassing the current detector, and wherein the bias controller further includes at least one switch to enable the measurement path in the first state, and to enable the primary path in the second state.

9. The bias controller of claim 8, wherein the first voltage supply is the same as the second voltage supply.

10. The bias controller of claim 8, wherein the first voltage supply is a regulated voltage supply derived from the second voltage supply.

11. The bias controller of claim 8, wherein at least one switch comprises a first switch to enable supply current flow through the measurement path in the first state, and to block supply current flow through the measurement path in the second state.

12. The bias controller of claim 11, wherein the current detector comprises a sense resistor coupled to at a first end to the second supply voltage, and coupled at a second end to a first terminal of the first switch, and wherein a second terminal of the first switch is coupled to the supply input of the power amplifier circuit.

13. The bias controller of claim 11, wherein the at least one switch further comprises a second switch to disable supply current flow through the primary path in the first state, and to enable supply current flow through the primary path in the second state, such that the supply current into the power amplifier circuit does not flow through the sense resistor in the second state.

14. The bias controller of claim 1, further comprising a one-shot circuit to generate a state control pulse responsive to an enable signal, such that the bias controller operates in the first state during assertion of the state control pulse, and operates in the second state when the state control pulse is de-asserted.

15. The bias controller of claim 2, wherein the closed loop control circuit further comprises an adjustment circuit to adjust the reference signal dependent on changes in the supply voltage.

16. The bias controller of claim 15 wherein the adjustment circuit detects the supply current and generates the reference signal responsive to the detected supply voltage.

17. The bias controller of claim 16 wherein the adjustment circuit comprises a digital signal processor.

18. The bias controller of claim 15 wherein the adjustment circuit comprises a resistive divider circuit.

19. A current modulator comprising:

an output circuit to modulate a supply current responsive to an amplitude modulation signal;

a bias controller comprising;

a current detector to generate a detection signal responsive to the supply current during quiescent conditions; and

a closed-loop control circuit to adjust the bias voltage responsive to the detection signal in a first state such that supply current is set substantially equal to a desired quiescent current value, and to maintain the bias voltage during a second state irrespective of the detection signal.

20. The current modulator of claim 19, wherein the modulation signal is inactive in the first state and active in the second state, such that the bias controller adjusts the bias voltage in the absence of the modulation signal.

21. The current modulator of claim 20, wherein the current modulator provides the supply current to the power amplifier circuit as a scaled version of a reference current, and wherein the current detector of the bias controller comprises a sense resistor disposed in series in a reference current path of the current modulator.

22. The current modulator of claim 20, further comprising a modulation input switch that couples a modulation input of the current modulator to the modulation signal in the second state, and to a reference voltage in the first state such that adjustment of the bias voltage occurs with a supply input of the power amplifier circuit set by the reference voltage.

23. The current modulator of claim 19, wherein the closed-loop control circuit comprises:

an amplifier circuit to generate an error signal responsive to a difference between the detection signal and a reference signal representative of the desired quiescent current value; and

a track-and-hold circuit to generate the bias voltage as a function of the error signal in the first state, and to maintain the bias voltage irrespective of the error signal in the second state.

24. The current modulator of claim 23 wherein the track-and-hold circuit comprises:

an input storage element coupled to an output of the amplifier circuit in the first state and decoupled in the second state, such that the input storage element tracks the error signal in the first state and holds a last value of the error signal in the second state; and

a buffer amplifier coupled to the input storage element to generate the bias voltage based on the error signal in the first state, and based on the last value of the error signal in the second state.

25. The current modulator of claim 24, wherein the buffer amplifier comprises a voltage follower circuit with a desired signal gain.

26. The current modulator of claim 25, wherein the buffer amplifier comprises a unity-gain voltage follower.

27. The current modulator of claim 25, wherein the track-and-hold circuit further comprises a coupling switch to selectively couple and decouple the input storage element from the error amplifier responsive to a bias adjust control signal.

28. The current modulator of claim 27, wherein the input storage element comprises a capacitor coupled at a first end to the coupling switch and to an input of the buffer amplifier, and coupled to a signal ground node at a second end, such that a capacitor voltage of the capacitor follows the error signal when coupled to the error amplifier, and remains substantially at the last value of the error signal when decoupled from the error amplifier.

29. The current modulator of claim 19, wherein a supply input of the power amplifier is coupled to a first supply voltage through a measurement path including the current detector, and to a second voltage supply through a primary path bypassing the current detector, and wherein the bias controller further includes at least one switch to enable the measurement path in the first state, and to enable the primary path in the second state.

30. The current modulator of claim 29, wherein the first voltage supply is the same as the second voltage supply.

31. The bias controller of claim 29, wherein the first voltage supply is a regulated voltage supply derived from the second voltage supply.

32. The current modulator of claim 29, wherein at least one switch comprises a first switch to enable supply current flow through the measurement path in the first state, and to block supply current flow through the measurement path in the second state.

33. The current modulator of claim 32, wherein the current detector comprises a sense resistor coupled to at a first end to the second supply voltage, and coupled at a second end to a first terminal of the first switch, and wherein a second terminal of the first switch is coupled to the supply input of the power amplifier circuit.

34. The current modulator of claim 32, wherein the at least one switch further comprises a second switch to disable supply current flow through the primary path in the first state, and to enable supply current flow through the primary path in the second state, such that the supply current into the power amplifier circuit does not flow through the sense resistor in the second state.

35. The current modulator of claim 19, further comprising a one-shot circuit to generate a state control pulse responsive to an enable signal, such that the bias controller operates in the first state during assertion of the state control pulse, and operates in the second state when the state control pulse is de-asserted.

36. The current modulator of claim 23, wherein the closed loop control circuit further comprises an adjustment circuit to detect a battery voltage and to adjust the reference voltage dependent on changes in the battery voltage.

37. The current modulator of claim 36 wherein the adjustment circuit comprises a digital signal processor.

38. The current modulator of claim 36 wherein the adjustment circuit comprises a resistive divider circuit.

39. A method of controlling a bias voltage signal that sets a quiescent current value of supply current to a power amplifier circuit, the method comprising:

detecting the supply current into the power amplifier circuit in a first state of operation;

adjusting the bias voltage during the first state of operation until the supply current substantially equals a desired quiescent current value;

maintaining the bias voltage during a second state of operation irrespective of the supply current.

40. The method of claim 39, wherein the first state of operation corresponds to a quiescent period of operation for the power amplifier circuit, and the second state of operation corresponds to an active period of operation for the power amplifier circuit.

41. The method of claim 39, wherein detecting the supply current into the power amplifier circuit in a first state of operation comprises:

coupling a supply input of the power amplifier circuit to a first voltage supply through a measurement path including a sense resistor; and

generating a detection signal proportionate to the supply current across the sense resistor.

42. The method of claim 41, wherein adjusting the bias voltage during the first state of operation until the supply current substantially equals a desired quiescent current value comprises:

generating an error signal based on the difference between the detection signal and a reference signal representing the desired quiescent current value; and

adjusting the bias voltage as a function of the error signal.

43. The method of claim 41, further comprising coupling the supply input of the power amplifier circuit to a second voltage supply through a primary path that bypasses the current sensor during the second state of operation.

44. The method of claim 39, wherein the supply current is provided to the power amplifier circuit as a scaled version of a reference current, and wherein detecting the supply current into the power amplifier circuit in a first state of operation comprises:

detecting the reference current; and

inferring a value of the supply current based on a known current scaling between the reference and supply currents.

45. The method of claim 44, wherein detecting the reference current comprises measuring a voltage drop across a sense resistor placed in series with the reference current.

46. The method of claim 39, further comprising applying substantially the same magnitude of supply voltage to the power amplifier circuit during the first and second states of operation to reduce quiescent current errors arising from variations in supply voltage between the first and second states of operation.

47. The method of claim 39, wherein the power amplifier circuit is a type of bipolar junction transistor circuit having a known Vce curve, and further comprising applying a voltage supply having a magnitude corresponding to a relatively flat portion of the Vce curve to the power amplifier circuit during the first state of operation.

48. The method of claim 39, further comprising controlling the first and second states of operation such that the first state of operation is a first period before a transmit signal is applied to the power amplifier circuit for amplification, and the second state of operation is a second period that includes amplification of the transmit signal by the power amplifier circuit.

49. The method of claim 48, further comprising timing the first period to occur in advance of a GSM transmit burst, and timing the second period to extend through the GSM transmit burst.

50. The method of claim 48, further comprising timing the first period to occur within a GSM burst time but before a pre-amplified burst signal is applied to the power amplifier circuit for amplification.

51. The method of claim 50, wherein the first period is positioned within the GSM burst time to occur after the initial transmit power mask level time has expired.

52. The method of claim 39, wherein adjusting the bias voltage during the first state of operation until the supply current substantially equals a desired quiescent current value comprises closing a control loop that sets the bias voltage based on a difference between the supply current and the desired quiescent current value.

53. The method of claim 52, wherein closing a control loop comprises:

generating an error signal with a difference amplifier coupled to a reference signal representing the desired quiescent current level, and coupled to a detection signal proportional to the supply current; and

adjusting the bias voltage as a function of the error signal.

54. The method of claim 39, wherein maintaining the bias voltage during a second state of operation irrespective of the detected supply current comprises storing the bias voltage set during the first state in an analog storage element.

55. The method of claim 54 further comprising adjusting the reference signal as a function of the supply voltage.

56. The method of claim 55 wherein adjusting the reference signal as a function of the supply voltage comprises detecting the supply voltage and adjusting the reference signal responsive to the detected supply voltage.

57. The method of claim 56 wherein detecting the supply voltage and adjusting the reference signal responsive to the detected supply voltage is performed by a digital signal processor.

58. The method of claim 55 adjusting the reference signal as a function of the supply voltage comprises dividing the supply voltage in a resistive divider to generate the reference signal such that changes in the supply voltage result in corresponding changes in the reference signal.

59. A method of setting supply current into a power amplifier to a desired quiescent current value by adjusting a bias voltage applied to the power amplifier, the method comprising:

generating a detection signal proportional to the supply current;

adjusting the bias voltage using closed-loop control responsive to the detection signal such that the supply current is set to the desired quiescent current value.

60. The method of claim 59, further comprising defining first and second states of operation, wherein the bias voltage is adjusted responsive to the detection signal during the first state, and held at an -adjusted value during the second state.

61. The method of claim 60, further comprising generating a control pulse of a defined width to control operation between the first and second states.

62. The method of claim 61, further comprising synchronizing generation of the control pulse substantially with the beginning of a transmit enable pulse, such that the first state transpires under quiescent conditions of the power amplifier in advance of a transmit burst, and transition to the second state occurs in advance of the transmit burst.

63. The method of claim 60, further comprising adjusting the reference signal during the second state such that the bias voltage is responsive to changes in the reference signal.

64. The method of claim 59, further comprising adjusting a nominal value of the reference signal in dependence on a magnitude of a supply voltage applied to the power amplifier during transmit operations.

65. The method of claim 64, wherein adjusting a nominal value of the reference signal in dependence on a magnitude of a supply voltage applied to the power amplifier during transmit operations comprises:

measuring the supply voltage; and

adjusting the nominal value of the reference signal responsive to changes in the supply voltage.