Apparatus and methods for dark level compensation in image sensors using dark pixel sensor metrics

• US 20030202111A1
• Filed: 04/30/2002
• Published: 10/30/2003
• Est. Priority Date: 04/30/2002
• Status: Abandoned Application

• Current Assignee: Jaejin Park
• Original Assignee: Jaejin Park
• Inventors: Park, Jaejin
• Application Number:
  US10/135,211
• Publication Number:
  US 20030202111A1
• Time in Patent Office: Days
• US Class Current: 348/243
• CPC Class Codes: H04N 25/616 involving a correlated sampling function, e.g. correlated double sampling [CDS] or triple sampling
• CPC Class Codes: H04N 25/63 applied to dark current

Abstract

An image sensor comprises a plurality of pixel sensors, e.g., CMOS pixel sensors, including a plurality of dark pixels. A dark level compensation circuit that controls an offset applied to an image signal generated by a pixel sensor responsive to an aggregate dark level metric, e.g., a mean dark level, derived from dark pixel image signals produced by the dark pixel sensors. For example, the dark level compensation circuit for CMOS image sensor using a column parallel architecture may generate an offset control signal that varies an offset of a reference signal used by an analog to digital converter (ADC) circuit that converts an analog image signal from a pixel sensor to a dark level compensated digital image signal.

Claims

1. A complementary metal oxide semiconductor (CMOS) image sensor, comprising:

a CMOS pixel sensor array comprising a plurality of rows of CMOS pixel sensors, each row of CMOS pixel sensors comprising at least one dark pixel sensor; and

a dark level compensation circuit that controls an offset applied to an image signal generated by a CMOS pixel sensor of the CMOS pixel array responsive to an aggregate dark level metric derived from dark pixel image signals produced by the dark pixel sensors.

2. An image sensor according to claim 1, wherein the dark level compensation circuit determines a mean dark level from the dark pixel image signals and controls the offset applied to the image signal generated by the CMOS pixel sensor responsive to the determined mean dark level.

3. An image sensor according to claim 2, wherein the dark level compensation circuit controls the offset applied to the image signal generated by the CMOS pixel sensor responsive to a comparison of the mean dark level to a target dark level.

4. An image sensor according to claim 3, wherein the dark level compensation circuit comprises:

an averaging circuit that processes the dark pixel image signals to generate a mean dark level signal; and

an offset control signal generator circuit, responsive to the averaging circuit, that generates an offset control signal applied to the image signal generated by the CMOS pixel sensor based on a comparison of the mean dark level signal to a target dark level signal.

5. An image sensor according to claim 4:

wherein the CMOS pixel sensor comprises a first CMOS pixel sensor that produces an analog image signal; and

wherein the image sensor further comprises a first analog-to-digital converter (ADC) circuit that converts the analog image signal produced by the first CMOS pixel sensor to a digital output signal subject to an offset controlled by the offset signal.

6. An image sensor according to claim 5, wherein the first ADC circuit comprises a correlated double sampling (CDS) ADC circuit.

7. An image sensor according to claim 6, wherein the CDS ADC circuit comprises a single-slope ADC circuit.

8. An image sensor according to claim 7, wherein the offset control signal controls an offset of a reference signal produced by the single-slope ADC circuit.

9. An image sensor according to claim 5:

wherein respective ones of the dark reference pixel sensors comprise respective second CMOS pixel sensors that generate respective analog dark level image signals;

wherein the image sensor comprises a plurality of second ADC circuits that convert respective ones of the analog dark level image signals to respective digital dark level signals;

wherein the averaging circuit comprises;

a summing circuit that sums the digital dark level signals to produce a digital dark level sum signal; and

a divider circuit that divides the digital dark level sum signal by a value derived from the number of the plurality of rows of the CMOS pixel array to produce a digital mean dark level signal;

wherein the offset control signal generator circuit comprises;

a subtraction circuit that subtracts the digital mean dark level signal from a digital target dark level signal to produce a digital error signal;

a digital accumulator circuit that compensates the digital error signal; and

a digital to analog converter (DAC) circuit that produces an analog offset control signal from the accumulated digital error signal; and

wherein the first ADC circuit converts the analog image signal produced by the first CMOS pixel sensor to the digital output signal subject to an offset controlled by the analog offset control signal.

10. An image sensor according to claim 1, wherein the CMOS pixel array comprises a first color pixel sensor in a first row and a second color pixel sensor in a second row, wherein the first and second color pixel sensors are coupled to the same image data line, wherein the image sensor further comprises an ADC circuit coupled to the image data line that produces a digital output signal from an analog image signal on the image data line subject to an offset that is controlled by an offset control signal applied to the ADC circuit, and wherein the dark level compensation circuit generates respective first and second offset signals to apply for the respective first and second color pixel sensors and selectively applies the first and second offset signals to the ADC circuit.

11. An image sensor, comprising:

a plurality of pixel sensors that produce respective analog image signals, the plurality of pixel sensors including a plurality of dark pixel sensors;

an analog to digital converter (ADC) circuit that receives an analog image signal generated by a pixel sensor of the plurality of pixel sensors and that produces a digital image signal therefrom subject to an offset controlled by an offset control signal; and

a dark level compensation circuit that generates the offset control signal responsive to analog image signals produced by the dark pixel sensors.

12. An image sensor according to claim 11, wherein the dark level compensation circuit produces the offset control signal based on an aggregate dark level metric derived from the analog image signals produced by the dark pixel sensors.

13. An image sensor according to claim 11:

wherein the ADC circuit produces digital dark pixel image signals from the analog image signals produced by the dark pixel sensors; and

wherein the dark level compensation circuit generates the offset control signal from the digital dark pixel image signals.

14. An image sensor according to claim 13, wherein the dark level compensation circuit comprises:

an averaging circuit that generates a mean dark level signal from the digital dark pixel image signals; and

an offset signal generator circuit that generates the offset control signal based on a comparison of the mean dark level signal to a target dark level signal.

15. An image sensor according to claim 11, wherein the ADC circuit comprises:

a ramp signal generator circuit that generates a reference ramp signal having an offset that varies responsive to the offset control circuit; and

a comparator circuit that compares the reference ramp signal to the analog image signal produced by the pixel sensor of the plurality of pixel sensors.

16. An image sensor according to claim 15, wherein the ADC circuit further comprises:

a counter circuit that produces a counter output signal; and

a latch circuit that latches the counter output responsive to an output signal produced by the comparator circuit.

17. An image sensor according to claim 11, wherein the plurality of pixel sensors comprises a first color pixel sensor in a first row and a second color pixel sensor in a second row, wherein the first and second color pixel sensors are coupled to the same image data line, wherein the ADC circuit is coupled to the image data line and produces a digital output signal from an analog image signal on the image data line subject to an offset controlled by the offset control signal, and wherein the dark level compensation circuit generates respective first and second offset control signals to apply for the respective first and second color pixel sensors and selectively applies the first and second offset signals to the ADC circuit.

18. An image sensor according to claim 11, wherein the plurality of pixel sensors comprises a plurality of CMOS pixel sensors.

19. A method of operating an image sensor, comprising:

generating dark pixel image signals from dark pixel sensors on multiple rows of a CMOS pixel sensor array;

generating an offset control signal from the dark pixel image signals;

producing an image signal from a pixel sensor of the CMOS pixel sensor array; and

applying an offset to the image signal responsive to the offset control signal.

20. A method according to claim 19, wherein generating an offset control signal comprises:

generating a mean dark level signal from the dark pixel image signals; and

generating the offset control signal from a comparison of the mean dark level signal to a target dark level signal.

21. A method according to claim 19, wherein applying an offset to the image signal comprises varying an offset applied in an analog to digital converter (ADC) circuit responsive to the offset control signal.

22. A method according to claim 21, wherein varying an offset applied in an ADC circuit comprises varying an offset of a reference signal.

23. A method of operating an image sensor comprising a plurality of pixel sensors, the method comprising:

generating dark pixel image signals from a plurality of dark pixel sensors included in the plurality of pixel sensors;

generating an offset control signal from the dark pixel image signals;

applying the offset control signal to an analog to digital converter (ADC) circuit that receives an analog image signal produced by a pixel sensor of the plurality of pixel sensors to produce a dark level compensated digital image signal.

24. A method according to claim 23, wherein applying the offset control signal to an analog to digital converter (ADC) circuit that receives an analog image signal produced by a pixel sensor of the plurality of pixel sensors to produce a dark level compensated digital image signal comprises:

varying an offset of a reference signal responsive to the offset control signal; and

comparing the analog image signal produced by the pixel sensor to the reference signal to generate a dark level compensated digital image signal.

25. A method according to claim 23, wherein the plurality of pixel sensors comprises a plurality of CMOS pixel sensors.