Method and system for rate enhanced SHDSL

• US 20030202612A1
• Filed: 12/18/2002
• Published: 10/30/2003
• Est. Priority Date: 12/18/2001
• Status: Abandoned Application

• Current Assignee: Ikanos Communications Incorporated (Qualcomm, Inc.)
• Original Assignee: Ikanos Communications Incorporated (Qualcomm, Inc.)
• Inventors: Pal, Debajyoti, Halder, Bijit, Erdogan, Alper Tunga
• Application Number:
  US10/321,601
• Publication Number:
  US 20030202612A1
• Time in Patent Office: Days
• US Class Current: 375/265
• CPC Class Codes: H03H 17/0288 Recursive, non-recursive, ladder, lattice structures
• CPC Class Codes: H03M 13/235 Encoding of convolutional codes, e.g. methods or arrangements for parallel or block-wise encoding
• CPC Class Codes: H03M 13/253 with concatenated codes
• CPC Class Codes: H03M 13/256 with trellis coding, e.g. with convolutional codes and TCM
• CPC Class Codes: H03M 13/2936 comprising an outer Reed-Solomon code and an inner convolutional code
• CPC Class Codes: H04L 1/0041 Arrangements at the transmitter end
• CPC Class Codes: H04L 1/0042 Encoding specially adapted to other signal generation operation, e.g. in order to reduce transmit distortions, jitter, or to improve signal shape H04L1/0067 takes precedence
• CPC Class Codes: H04L 1/0045 Arrangements at the receiver end
• CPC Class Codes: H04L 1/0047 Decoding adapted to other signal detection operation in conjunction with sequence estimation or equalization H04L25/03286
• CPC Class Codes: H04L 1/0057 Block codes H04L1/0061, H04L1/0064 take precedence
• CPC Class Codes: H04L 1/0059 Convolutional codes
• CPC Class Codes: H04L 1/006 Trellis-coded modulation
• CPC Class Codes: H04L 2025/03414 Multicarrier
• CPC Class Codes: H04L 2025/03503 as a combination of feedback and prediction filters
• CPC Class Codes: H04L 2025/03509 fractionally spaced H04L2025/03515 takes precedence
• CPC Class Codes: H04L 2025/03611 Iterative algorithms
• CPC Class Codes: H04L 25/03063 using fractionally spaced delay lines or combinations of fractionally and integrally spaced taps
• CPC Class Codes: H04L 27/02 Amplitude-modulated carrier systems, e.g. using on-off keying; Single sideband or vestigial sideband modulation H04L27/32 takes precedence
• CPC Class Codes: H04L 27/3405 Modifications of the signal space to increase the efficiency of transmission, e.g. reduction of the bit error rate, bandwidth, or average power
• CPC Class Codes: H04L 27/3433 using an underlying square constellation
• CPC Class Codes: H04L 5/0044 : allocation of payload

Abstract

An embodiment of the present invention is directed to a rate enhanced system for supporting duplex transmission of symmetric data rates. The system comprises an encoder comprising a serial to parallel converter for receiving a serial data bit, and for generating a parallel word having M bits; a convolutional encoder for receiving a first bit of the M bits of the parallel word, and for generating two encoded bits; and a mapper for receiving the two encoded bits and the remaining M−1 bits of the parallel word, and for generating a symbol; wherein M is greater than three.

Claims

1. A rate enhanced system for supporting duplex transmission of symmetric data rates, the system comprising an encoder comprising:

a serial to parallel converter for receiving a serial data bit, and for generating a parallel word having M bits;

a convolutional encoder for receiving a first bit of the M bits of the parallel word, and for generating two encoded bits; and

a mapper for receiving the two encoded bits and the remaining M−

1 bits of the parallel word, and for generating a symbol;

wherein M is greater than three.

2. The system of claim 1, wherein the encoder is a Trellis coded modulation encoder.

3. The system of claim 1, further comprising a receiver comprising:

a Trellis decoder for accommodating a constellation size greater than 16-PAM.

4. The system of claim 1, wherein the system supports an enhanced data rate which is greater than 2.312 Mbps.

5. The system of claim 4, wherein the enhanced data rate is defined as R_ed=M/3R_d wherein M>

3 wherein R_d represents an original data rate for SHDSL.

6. The system of claim 1, wherein constellation size associated with the mapper is greater than 16-PAM.

7. The system of claim 1, wherein a single pair of wires is implemented.

8. The system of claim 1, being compatible with four wire operations for doubling of data rate.

9. The system of claim 1, wherein the transmit masks correspond to that of SHDSL standard.

10. The system of claim 1, wherein the mapper is a 2^M+1 PAM constellation, wherein M is greater than 3.

11. The system of claim 1, further comprising a receiver comprising:

a deframer for supporting enhanced data rates greater than 2.312 Mbps; and

a decoder for supporting a constellation size greater than 16-PAM.

12. The system of claim 11, wherein the decoder is a Trellis decoder.

14. The method of claim 1, wherein the encoder is a Trellis coded modulation encoder.

15. The method of claim 1, wherein an enhanced data rate greater than 2.312 Mbps is supported.

16. The method of claim 15, wherein the enhanced data rate is defined as R_ed=M/3R_d wherein M>

3 wherein R_d represents an original data rate for SHDSL.

21. The method of claim 1, wherein the mapper is a 2^M+1 PAM constellation, wherein M is greater than 3.

13. A method for supporting duplex transmission of symmetric data rates, the method comprising the steps of:

receiving a serial data bit;

generating a parallel word having M bits in response to the serial data bit;

receiving a first bit of the M bits of the parallel word;

generating two encoded bits in response to the first bit;

receiving the two encoded bits and the remaining M−

1 bits of the parallel word; and

generating a symbol in response to the two encoded bits and the remaining M−

1 bits of the parallel word;

wherein M is greater than three.

17. The method of claim 13, wherein constellation size associated with the mapper is greater than 16-PAM.

18. The method of claim 13, wherein a single pair of wires is implemented.

19. The method of claim 13, being compatible with four wire operations for doubling of data rate.

20. The method of claim 13, wherein the transmit masks correspond to that of SHDSL standard.