Methods of manufacturing a lithography template

• US 20030205657A1
• Filed: 05/01/2002
• Published: 11/06/2003
• Est. Priority Date: 05/01/2002
• Status: Active Grant

• Current Assignee: Mii Newco, Inc. (Canon Inc.)
• Original Assignee: Molecular Imprints, Inc. (Canon Inc.)
• Inventors: Voisin, Ronald D.
• Granted Patent: US 7,037,639 B2
• Time in Patent Office: Days
• US Class Current: 249/187.1
• CPC Class Codes: B82Y 10/00 Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
• CPC Class Codes: B82Y 40/00 Manufacture or treatment of nanostructures
• CPC Class Codes: G03F 1/34 Phase-edge PSM, e.g. chromeless PSM; Preparation thereof
• CPC Class Codes: G03F 7/0002 Lithographic processes using patterning methods other than those involving the exposure to radiation, e.g. by stamping
• CPC Class Codes: G03F 7/0017 for the production of embossing, cutting or similar devices; for the production of casting means
• CPC Class Codes: G03F 7/093 characterised by antistatic means, e.g. for charge depletion

Abstract

A method for forming imprint lithography templates is described herein. The method includes forming a masking layer and a conductive layer on a substrate surface. The use of a conductive layer allows patterning of the masking layer using electron beam pattern generators. The substrate is etched using the patterned masking layer to produce a template.

Claims

1. A method of forming a lithography template comprising:

forming a layer of conductive polysilicon upon a substrate, wherein the substrate is composed of a light transmissive material;

forming a masking layer upon the conductive polysilicon layer;

forming a pattern in the masking layer such that a portion of the conductive polysilicon layer is exposed through the masking layer;

etching one or more of the exposed portions of the conductive polysilicon layer such that a portion of the substrate is exposed through the polysilicon layer; and

etching one or more of the exposed portions of the substrate.

2. The method of claim 1, further comprising removing the masking layer and the conductive polysilicon layer.

3. The method of claim 1, wherein the substrate is a glass.

4. The method of claim 1, wherein the substrate is quartz glass.

5. The method of claim 1, wherein the substrate is fused silica.

6. The method of claim 1, wherein the conductive polysilicon layer is n-doped polysilicon.

7. The method of claim 1, wherein the conductive polysilicon layer has a conductivity sufficient to remove a portion of the charge from the substrate during patterning of the masking layer with an electron beam pattern generator.

8. The method of claim 1, wherein the masking layer is a photoresist material.

9. The method of claim 1, wherein etching of the one or more exposed portions of the conductive polysilicon layer comprises using an anisotropic etching process.

10. The method of claim 1, wherein etching of the one or more exposed portions of the substrate comprises using an anisotropic etching process.

11. The method of claim 1, wherein etching of the one or more exposed portions of the substrate comprises using an anisotropic etching process, and wherein etching of the one or more exposed portions of the conductive polysilicon layer comprises using an anisotropic etching process.

12. The method of claim 1, wherein the masking layer is a photoresist material, and wherein forming a pattern in the masking layer comprises:

coating the conductive polysilicon with a photoresist material;

exposing one or more portions of the photoresist material to an electron beam with an electron beam pattern generator;

removing one or more of the exposed portions of the photoresist material.

13. The method of claim 1, wherein the masking layer is a photoresist material, and wherein forming a pattern in the masking layer comprises:

coating the conductive polysilicon with a photoresist material;

exposing one or more portions of the photoresist material to light with a laser pattern generator;

removing one or more of the exposed portions of the photoresist material.

14. The method of claim 1, wherein the masking layer is a photoresist material, and wherein forming a pattern in the masking layer comprises:

coating the conductive polysilicon with a photoresist material;

exposing one or more portions of the photoresist material to an electron beam with an electron beam pattern generator;

removing one or more of the unexposed portions of the photoresist material.

15. The method of claim 1, wherein the masking layer is a photoresist material, and wherein forming a pattern in the masking layer comprises:

coating the conductive polysilicon with a photoresist material;

exposing one or more portions of the photoresist material to light with a laser pattern generator;

removing one or more of the unexposed portions of the photoresist material.

16. The method of claim 1, further comprising removing the masking layer and inspecting the pattern produced in the conductive polysilicon layer.

17. The method of claim 16, wherein the depth of the pattern etched in the substrate is selected for the desired aspect ratio in the template and wherein inspecting the pattern formed on the conductive polysilicon layer comprises exposing the polysilicon layer to an inspection light, wherein the polysilicon thickness and the wavelength of the inspection light is predetermined to enhance the contrast between the patterned conductive polysilicon layer and the exposed portions of the substrate.

18. The method of claim 16, wherein the polysilicon layer has a thickness that is about ½

of the wavelength of the inspection light.

19. A template made by the method of claim 1.

20. A method of forming a lithography template comprising:

forming a layer of conductive polysilicon upon a substrate, wherein the substrate is composed of a light transmissive material;

forming a masking layer upon the conductive polysilicon layer;

forming a pattern in the masking layer such that a portion of the conductive polysilicon layer is exposed through the masking layer;

anisotropically etching one or more of the exposed portions of the conductive polysilicon layer such that a portion of the substrate is exposed through the polysilicon layer;

anisotropically etching one or more of the exposed portions of the substrate;

removing the masking layer and inspecting the pattern produced in the conductive polysilicon layer, wherein the depth of the pattern etched in the substrate is selected for the desired aspect ratio in the template and wherein inspecting the pattern formed on the conductive polysilicon layer comprises exposing the polysilicon layer to an inspection light, wherein the conductive polysilicon thickness and the wavelength of the inspection light is predetermined to enhance the contrast between the patterned conductive polysilicon layer and the exposed portions of the substrate.

21. A method of forming a lithography template comprising:

forming a masking layer upon a substrate, wherein the substrate is composed of a light transmissive material;

forming a layer of a conductive metal on the masking layer, exposing a portion of the masking layer to electrons through the conductive layer with an electron beam process;

removing at least a portion of the conductive layer and one or more of the exposed portions of the masking layer such that the substrate is exposed through the masking layer; and

etching the exposed portions of the substrate.

22. The method of claim 21, further comprising removing the masking layer.

23. The method of claim 21, wherein the substrate is a glass.

24. The method of claim 21, wherein the substrate is quartz glass.

25. The method of claim 21, wherein the substrate is fused silica.

26. The method of claim 21, wherein the masking layer is a photoresist material.

27. The method of claim 21, wherein the conductive metal layer has a thickness of less than about 100 Å

.

28. The method of claim 21, wherein the conductive metal layer comprises aluminum.

29. The method of claim 21, wherein etching of the one or more exposed portions of the substrate comprises using an anisotropic etching process.

30. The method of claim 21, further comprising inspecting the pattern produced in the masking layer.

31. A template made by the method of claim 21.

32. A method of forming a lithography template comprising:

providing a substrate, the substrate comprising a base layer, an etch stop layer disposed upon the base layer, and an upper layer disposed above the etch stop layer, wherein the base layer, the etch stop layer, and the upper layer are composed of a light transmissive material;

forming a layer of conductive polysilicon upon the upper layer;

forming a masking layer upon the conductive polysilicon layer;

forming a pattern in the masking layer such that a portion of the conductive polysilicon layer is exposed through the masking layer;

etching one or more of the exposed portions of the conductive polysilicon layer such that a portion of the substrate is exposed through the polysilicon layer;

etching one or more of the exposed portions of the substrate until the etch stop layer is reached.

33. The method of claim 32, further comprising removing the masking layer and the conductive polysilicon layer.

34. The method of claim 32, wherein the substrate is a glass.

35. The method of claim 32, wherein the substrate is quartz glass.

36. The method of claim 32, wherein the substrate is fused silica.

37. The method of claim 32, wherein the etch stop layer is indium tin oxide.

38. The method of claim 32, wherein the upper layer is deposited silicon dioxide.

39. The method of claim 32, wherein the upper layer is grown quartz.

40. The method of claim 32, wherein the conductive polysilicon layer is n-doped polysilicon.

41. The method of claim 32, wherein the conductive polysilicon layer has a conductivity sufficient to remove a portion of the charge from the substrate during etching of the masking layer with an electron beam pattern generator.

42. The method of claim 32, wherein the masking layer is a photoresist material.

43. The method of claim 32, wherein the masking layer is a photoresist material, and wherein forming a pattern in the masking layer comprises:

coating the conductive polysilicon with a photoresist material;

exposing one or more portions of the photoresist material to an electron beam with an electron beam pattern generator;

removing one or more of the exposed portions of the photoresist material.

44. The method of claim 32, wherein the masking layer is a photoresist material, and wherein forming a pattern in the masking layer comprises:

coating the conductive polysilicon with a photoresist material;

exposing one or more portions of the photoresist material to light with a laser pattern generator;

removing one or more of the exposed portions of the photoresist material.

45. The method of claim 32, wherein the masking layer is a photoresist material, and wherein forming a pattern in the masking layer comprises:

coating the conductive polysilicon with a photoresist material;

exposing one or more portions of the photoresist material to an electron beam with an electron beam pattern generator;

removing one or more of the unexposed portions of the photoresist material.

46. The method of claim 32, wherein the masking layer is a photoresist material, and wherein forming a pattern in the masking layer comprises:

coating the conductive polysilicon with a photoresist material;

exposing one or more portions of the photoresist material to light with a laser pattern generator;

removing one or more of the unexposed portions of the photoresist material.

47. The method of claim 32, further comprising removing the masking layer and inspecting the pattern produced in the conductive polysilicon layer.

48. The method of claim 47, wherein the depth of the pattern etched in the substrate is selected for the desired aspect ratio in the template and wherein inspecting the pattern formed on the conductive polysilicon layer comprises exposing the polysilicon layer to an inspection light, wherein the polysilicon thickness and the wavelength of the inspection light is predetermined to enhance the contrast between the patterned conductive polysilicon layer and the exposed portions of the substrate.

49. The method of claim 47, wherein the polysilicon layer has a thickness that is about ½

of the wavelength of the inspection light.

50. A template made by the method of claim 32.

51. A method of forming a lithography template comprising:

providing a substrate, the substrate comprising a base layer, an etch stop layer disposed upon the base layer, and an upper layer disposed above the etch stop layer, wherein the base layer, the etch stop layer, and the upper layer are composed of a light transmissive material;

forming a masking layer upon the upper layer;

forming a layer of a conductive metal on the masking layer,

exposing one or more portions of the masking layer to electrons through the conductive layer with an electron beam process;

removing at least a portion of the conductive layer and one or more of the exposed portions of the masking layer such that the substrate is exposed through the masking layer;

etching the exposed portions of the substrate.

52. The method of claim 51, further comprising removing the masking layer.

53. The method of claim 51, wherein the substrate is a glass.

54. The method of claim 51, wherein the substrate is quartz glass.

55. The method of claim 51, wherein the substrate is fused silica.

56. The method of claim 51, wherein the etch stop layer is indium tin oxide.

57. The method of claim 51, wherein the upper layer is deposited silicon dioxide.

58. The method of claim 51, wherein the upper layer is grown quartz.

59. The method of claim 51, wherein the masking layer is a photoresist material.

60. The method of claim 51, wherein the conductive metal layer has a thickness of less than about 100 Å

.

61. The method of claim 51, wherein the conductive metal layer comprises aluminum.

62. The method of claim 51, further comprising inspecting the pattern produced in the masking layer.

63. A template made by the method of claim 51.