Encapsulation for organic electronic devices

• US 20030207500A1
• Filed: 11/20/2002
• Published: 11/06/2003
• Est. Priority Date: 05/02/2002
• Status: Active Grant

• Current Assignee: Pictiva Displays International Limited (f/k/a Dolya Holdco 5 Limited) (Key Patent Innovations Limited)
• Original Assignee: Osram Opto Semiconductors GmbH (Ams-Osram AG)
• Inventors: Pichler, Karl, Lacey, David
• Granted Patent: US 6,911,667 B2
• Time in Patent Office: Days
• US Class Current: 438/127
• CPC Class Codes: B29C 33/06 using radiation , e.g. electro-magnetic waves, induction heating
• CPC Class Codes: H01L 21/31051 Planarisation of the insulating layers H01L21/31058 takes precedence
• CPC Class Codes: H10K 50/844 Encapsulations
• CPC Class Codes: H10K 50/846 comprising getter material or desiccants
• CPC Class Codes: H10K 71/00 Manufacture or treatment specially adapted for the organic devices covered by this subclass

Abstract

An embodiment of the present invention pertains to encapsulating an organic electronic device by selectively depositing a catalyst layer and then exposing the catalyst layer to a monomer to produce a planarization layer. The monomer reacts only in the areas where the catalyst layer is present so there is minimal or no contamination of other areas of the organic electronic device. Selectively depositing the catalyst layer allows the resulting planarization layer to be patterned. A barrier layer is selectively deposited on at least the planarization layer.

Another embodiment of the present invention pertains to encapsulating an organic electronic device by depositing a planarization layer on a transfer substrate and then allowing it to stabilize to minimize its reactivity. The planarization layer is transferred from the transfer substrate onto at least an active area of the organic electronic device. A barrier layer is selectively deposited on at least the planarization layer.

Claims

1. A method of encapsulating an organic electronic device, comprising:

fabricating said organic electronic device on a substrate, said organic electronic device having an active area;

selectively depositing a catalyst layer on at least said active area;

exposing said catalyst layer to a monomer to produce a planarization layer where said catalyst layer was selectively deposited; and

selectively depositing a barrier layer on at least said planarization layer.

2. The method of claim 1 wherein selectively depositing said catalyst layer includes printing said catalyst layer.

3. The method of claim 1 further comprising

evaporating through a shadow mask an electrode layer of said organic electronic device,

wherein selectively depositing said catalyst layer on at least said active area includes evaporating said catalyst layer through said shadow mask onto at least said electrode layer, and

wherein selectively depositing said barrier layer on at least said planarization layer includes depositing said barrier layer through another shadow mask.

4. The method of claim 3 further comprising

evaporating another catalyst layer through said other shadow mask onto said barrier layer;

and

exposing said other catalyst layer to said monomer to produce another planarization layer where said other catalyst layer was selectively deposited.

5. The method of claim 4 wherein said other shadow mask has a different opening size than said shadow mask.

6. The method of claim 3 wherein a distance between said substrate and said shadow mask differ when selectively depositing two different layers.

7. The method of claim 1 wherein selectively depositing said barrier layer includes depositing said barrier layer in a larger area than said catalyst layer.

8. An encapsulated electronic device, comprising:

a substrate;

an organic electronic device on said substrate, said organic electronic device having an active area;

a planarization layer on at least said active area, wherein said planarization layer is formed by selectively depositing a catalyst layer on at least said active area and exposing said catalyst layer to a monomer, wherein said planarization layer resides where said catalyst layer was selectively deposited; and

a barrier layer on at least said planarization layer.

9. The electronic device of claim 8 wherein selectively depositing said catalyst layer includes printing said catalyst layer.

10. The electronic device of claim 8 wherein said organic electronic device includes an electrode layer that is evaporated through a shadow mask and wherein said catalyst layer is selectively deposited on at least said active area by evaporating said catalyst layer through said shadow mask onto at least said electrode layer.

11. The electronic device of claim 10 wherein said barrier layer is formed by depositing it through another shadow mask.

12. The electronic device of claim 11 further comprising another planarization layer on said barrier layer wherein said other planarization layer is formed by evaporating another catalyst layer through said other shadow mask and exposing said other catalyst layer to said monomer, wherein said other planarization layer resides where said other catalyst layer was selectively deposited.

13. The electronic device of claim 12 wherein said other shadow mask has a different opening size than said shadow mask.

14. The electronic device of claim 8 wherein said planarization layer is dicyclopentadienyl zirconium borate and said monomer is propylene.

15. The electronic device of claim 8 wherein said organic electronic device is an organic light emitting device, an organic transistor, an organic detector, or a solar cell.

16. A method of encapsulating an organic electronic device, comprising:

fabricating said organic electronic device on a first substrate, said organic electronic device having an active area;

depositing a planarization layer on a second substrate;

transferring said planarization layer onto at least said active area; and

depositing a barrier layer on at least said planarization layer.

17. The method of claim 16 further comprising, prior to transferring said planarization layer, stabilizing said planarization layer to minimize its reactivity.

18. The method of claim 17 wherein stabilizing said planarization layer includes evaporating solvents from said planarization layer, curing said planarization layer, or allowing reactions within said planarization layer to mature to form a more stable and less reactive layer.

19. The method of claim 16 wherein transferring said planarization layer includes thermally transferring said planarization layer or transferring said planarization layer using laser-induced thermal imaging.

20. The method of claim 16 wherein depositing said planarization layer includes selectively depositing said planarization layer.

21. The method of claim 16 wherein said planarization layer is patterned when transferring it onto at least said organic electronic device.

22. The method of claim 16 further comprising, upon transferring said planarization layer, treating the imperfections of said planarization layer.

23. An encapsulated electronic device, comprising:

a substrate;

an organic electronic device on said substrate, said organic electronic device having an active area;

a planarization layer on at least said active area; and

a barrier layer on at least said planarization layer,

wherein said planarization layer is first deposited on another substrate and then transferred onto at least said active area.

24. The electronic device of claim 23 further comprising, prior to transferring said planarization layer, allowing said planarization layer to stabilize to minimize its reactivity.

25. The electronic device of claim 23 wherein said planarization layer is thermally transferred onto at least said active area or is transferred onto at least said active area using laser-induced thermal imaging.

26. The electronic device of claim 23 wherein said planarization layer is patterned.

27. The electronic device of claim 23 wherein said organic electronic device is an organic light emitting device, an organic transistor, an organic detector, or a solar cell.