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Anti-fuse structure and method of writing and reading in integrated circuits

  • US 20030207526A1
  • Filed: 06/05/2003
  • Published: 11/06/2003
  • Est. Priority Date: 06/02/2001
  • Status: Active Grant
First Claim
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1. An integrated circuit chip comprising:

  • an integrated circuit (IC) in a semiconductor subs-rate;

    an information write-register circuit embedded in said IC, said write-register having a plurality of independently addressable components;

    each of said components formed as an isolated p-well nested in an isolated n-well, said p-well having a gate for control; and

    said gate positioned on an insulator geometrically formed so that it is susceptible locally to electrical conductivity upon applying an overstress voltage pulse, whereby binary information can be permanently encoded into said component.

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