Method of etching silicon nitride spacers with high selectivity relative to oxide in a high density plasma chamber

• US 20030207585A1
• Filed: 05/02/2002
• Published: 11/06/2003
• Est. Priority Date: 05/02/2002
• Status: Active Grant

• Current Assignee: Applied Materials Incorporated
• Original Assignee: Applied Materials Incorporated
• Inventors: Jang, Bi, Kim, Nam-hun, Choi, Jinhan
• Granted Patent: US 6,756,313 B2
• Time in Patent Office: Days
• US Class Current: 438/723
• CPC Class Codes: H01L 21/31116 by dry-etching

Abstract

We have developed a method of selectively etching silicon nitride relative to oxides in a high density plasma chamber of the kind presently known in the art. We have obtained selectivities for silicon nitride:silicon oxide in the range of about 15:1 to about 24:1. We have employed the method in the etching of silicon nitride spacers for sub 0.25 μm devices, where the spacers are adjacent to exposed oxides during the etch process. We have obtained silicon nitride spacers having rounded top corners and an extended “tail” toward the bottom outer edge of the nitride spacer. The method employs a plasma source gas which typically includes SF₆, HBr, N₂ and optionally, O₂. Typically, the pressure in the etch chamber during etching is at least 35 mTorr and the substrate temperature is about 20° C. or less.

Claims

1. A method of selectively etching silicon nitride spacers for sub 0.25 μ

m devices, where the selectivity of silicon nitride relative to silicon oxide is in the range of about 15;

1 to about 24;

1, the method comprising;

a) providing a substrate which includes a silicon oxide layer adjacent a silicon nitride layer, wherein the thickness of the silicon oxide layer is less than about 20 Å

;

b) etching said silicon nitride layer to form at least one silicon nitride spacer, wherein the upper shoulder of the spacer is rounded, and said etching is carried out using a plasma source gas including SF₆, HBr, and N₂, wherein a pressure in an etch chamber in which said etching is carried out is at least 35 mTorr, and wherein a temperature of said substrate during said etching is less than about 75°

C.

2. A method in accordance with claim 1, wherein the width of said silicon nitride spacer at a base of said spacer ranges from about 400 Å

to about 900 Å

.

3. A method in accordance with claim 1, wherein said selectivity of silicon nitride relative to silicon oxide is in the range of about 20:

1 to about 24;

1, wherein said pressure in said etch chamber is at least 50 mTorr, and wherein said temperature of said substrate is about 20°

C. or less.

4. A method in accordance with claim 3, wherein said pressure in said etch chamber is at least 60 mTorr.

5. A method in accordance with claim 1 or claim 2, or claim 3, wherein said thickness of said oxide layer is reduced by less than about 50% during said etching of said silicon nitride layer.

6. A method in accordance with claim 5, wherein said thickness of said oxide layer is reduced by less than about 25% during said etching of said silicon nitride layer.

7. A method in accordance with claim 5, wherein the volumetric flow rate ratio of HBr:

SF₆ ranges from about 1.8;

1 to about 4;

1.

8. A method in accordance with claim 6, wherein the volumetric flow rate ratio of N₂:

SF₆ ranges from about 0.5;

1 to about 1.5;

1.

9. A method of selectively etching silicon nitride spacers for sub 0.25 μ

m devices, where the selectivity of silicon nitride relative to silicon oxide is in the range of about 15;

1 to about 24;

1, the method comprising;

a) providing a substrate which includes a silicon oxide layer adjacent a silicon nitride layer, wherein the thickness of the silicon oxide layer is less than about 20 Å

;

b) etching said silicon nitride layer to form at least one silicon nitride spacer, wherein the width of said silicon nitride spacer at the base of the spacer ranges from about 400 Å

to about 900 Å

, and the upper shoulders of the spacer are rounded, and said etching is carried out using a plasma source gas including SF₆, HBr, and N₂, wherein the volumetric flow rate ratio of HBr;

SF₆ ranges from about 1.8;

1 to about 4;

1, and the volumetric flow rate ratio of N₂;

SF₆ ranges from about 0.5;

1 to about 1.5;

1.

10. A method in accordance with claim 9, where O₂ is added to the plasma source gas, and wherein the volumetric flow rate ratio of O₂:

SF₆ ranges from about 0.55;

1 to about 1;

1.

11. A method in accordance with claim 9 or claim 10, wherein a pressure in an etch chamber in which said etching is carried out is at least 35 m Torr.

12. A method in accordance with claim 11, wherein said thickness of said oxide layer is reduced by less than about 50% during said etching of said silicon nitride layer.

13. A method in accordance with claim 12 wherein said thickness of said oxide layer is reduced by less than about 25% during said etching of said silicon nitride layer.

14. A method of etching silicon nitride spacers having rounded corners in a plasma etch processing chamber which is considered to be a high density plasma processing chamber, such that the processing chamber is typically operated at plasma densities in the range of 10¹² e⁻

/cm³, the method comprising;

a) placing a substrate which includes a silicon oxide layer adjacent a silicon nitride layer, wherein the thickness of the silicon oxide layer is less than about 20 Å

, in said processing chamber;

b) etching said silicon nitride layer to form at least one silicon nitride spacer, wherein said etching is carried out using a plasma source gas including SF₆, HBr, and N₂, wherein the volumetric flow rate ratio of HBr;

SF₆ ranges from about 1.8;

1 to about 4;

1, wherein the volumetric flow rate ratio of N₂;

SF₆ ranges from about 0.5;

1 to about 1.5;

1, and wherein a pressure in said processing chamber is increased over a range of from about 35 mTorr to about 80 mTorr, while a plasma source power is adjusted in concert with said pressure increase, whereby rounded corners are produced on said silicon nitride spacer.

15. A method in accordance with claim 14, wherein, prior to or subsequent to etching of said silicon nitride spacer, additional etching is carried out said plasma processing chamber, and said additional etching produces a feature size of 0.1 μ

m or less.

16. A method in accordance with claim 14, where no substrate biasing power is applied.

17. A method in accordance with claim 14 or claim 16, wherein said plasma source power is increased as said pressure in said processing chamber is increased.

18. A method in accordance with claim 14 or claim 16, wherein said plasma source power is increased over a range from about 500 Watts to about 1,200 Watts.

19. A method in accordance with claim 14, wherein said substrate temperature is about 20°

C. or less.

20. A method in accordance with claim 18, wherein said substrate temperature is about 20°

C. or less.