Acquisition system for a long record length digital storage oscilloscope

• US 20030208330A1
• Filed: 05/02/2002
• Published: 11/06/2003
• Est. Priority Date: 05/02/2002
• Status: Active Grant

• Current Assignee: Tektronix Incorporated (Fortive Corp.)
• Original Assignee: Tektronix Incorporated (Fortive Corp.)
• Inventors: Pickerd, John J.
• Granted Patent: US 6,807,496 B2
• Time in Patent Office: Days
• US Class Current: 702/80
• CPC Class Codes: G01R 13/28 Circuits for simultaneous or sequential presentation of more than one variable
• CPC Class Codes: G01R 13/345 for displaying sampled signals by using digital processors by intermediate A.D. and D.A. convertors (control circuits for CRT indicators)

Abstract

A real time digital storage oscilloscope acquires a long data record in an acquisition memory and processes the data of the long data record to search for predetermined events. Upon detection of such a predetermined event, circuitry generates an event detect signal, and data comprising an acquisition frame surrounding the event is applied to a waveform processing and display system. The long data record can be replayed in order to perform additional searches throughout the data record using different search criteria, thereby permitting multiple waveforms to be displayed simultaneously, each being captured as a result of a different user-defined event. A screen display may be programmed to display a different kind of event such as Runt signal, Overshoot, or Pulsewidth Violation in each waveform, or to display multiple occurrences of the same kind of event such as Runt signal in each waveform.

Claims

1. Acquisition System for a long record length digital oscilloscope, comprising:

an input terminal for receiving a signal under test;

an analog-to-digital converter having an input coupled to said input terminal for receiving said signal under test, and producing digital samples of said signal under test at an output;

a trigger circuit having an input coupled to said input terminal for receiving said signal under test, and producing a trigger signal at an output in response to detection of a predetermined trigger event in said signal under test;

an acquisition memory for storing said digital samples of said signal under test in a data record; and

processor circuitry for examining said stored digital samples in a post acquisition mode of operation and producing an event detect signal in response to detection of a predetermined event in said stored digital samples, and causing a predetermined amount of said stored digital samples to be read from said acquisition memory and sent to a signal processing portion of said oscilloscope for processing and display;

said predetermined amount of said stored digital samples being less than the whole data record and being related in time to said event detect signal.

2. The acquisition system of claim 1 wherein:

said processor operates in one of a one-shot mode and an Autorun mode;

in said one-shot mode, said processor repeatedly examines a single data record;

in said Autorun mode, said processor causes the acquisition of a new data record upon completion of examination of a currently stored data record.

3. The acquisition system of claim 2 wherein:

data representative of said predetermined event is input to said processor by a user for causing said processor to produce said event detect signal upon detection of said event.

4. The acquisition system of claim 3 wherein:

said processor is responsive to input data entered by a user for changing said data representative of said predetermined event;

said input data entered by said user is accepted by said processor before or during said examination of said data record.

5. The acquisition system of claim 4 wherein:

said predetermined amount of stored digital samples represents a frame of samples surrounding said second trigger event, and a magnitude of said predetermined amount of stored digital signals is controllable by said user.

6. The acquisition system of claim 5 wherein said oscilloscope has multiple channels:

each of said channels having a long record length memory associated therewith;

each of said long record length memories being concatenated with the others to form a single long record length memory.

7. The acquisition system of claim 6 wherein said oscilloscope has multiple channels:

each of said channels having a long record length memory associated therewith; and

said processor comprises individual processing units each of which is associated with a respective one of said long record length memories of said channels.

8. The acquisition system of claim 7 wherein:

each of said individual processing units can be programmed to detect a plurality of different events; and

waveforms representative of data surrounding each of said respective different events are simultaneously displayed on a display screen of said oscilloscope.

9. The acquisition system of claim 6 wherein said processor is an FPGA.

10. The acquisition system of claim 6 wherein said processor is a microcomputer.

11. The acquisition system of claim 6 wherein said processor is an ASIC.

12. The acquisition system of claim 7 wherein said processor is an FPGA.

13. The acquisition system of claim 7 wherein said processor is a microcomputer.

14. The acquisition system of claim 7 wherein said processor is an ASIC.

15. A long record length digital oscilloscope, comprising:

an input terminal for receiving a signal under test;

an analog-to-digital converter having an input coupled to said input terminal for receiving said signal under test, and producing digital samples of said signal under test at an output;

a trigger circuit having an input coupled to said input terminal for receiving said signal under test, and producing a trigger signal at an output in response to detection of a predetermined trigger event in said signal under test;

an acquisition memory for storing said digital samples of said signal under test in a data record;

a demultiplexer unit coupled between said analog-to-digital converter and said acquisition memory for receiving said digital samples and controlling the flow of said samples to said acquisition memory in response to said trigger signal received from said trigger circuit;

processor circuitry for examining said stored digital samples in a post acquisition mode of operation and producing an event detect signal in response to detection of a predetermined event in said stored digital samples, and producing memory address signals indicative of a range of memory locations containing data relating to said predetermined event; and

a system processor for causing a predetermined amount of said stored digital samples to be read from said acquisition memory and sent to a signal processing portion of said oscilloscope for processing and display in response to said event detect signal and said memory address signals;

said predetermined amount of said stored digital samples being less than the whole data record and being related in time to said event detect signal.

16. The long record length digital oscilloscope of claim 15 wherein:

said processor operates in one of a one-shot mode and an Autorun mode;

in said one-shot mode, said processor repeatedly examines a single data record;

in said Autorun mode, said processor causes the acquisition of a new data record upon completion of examination of a currently stored data record.

17. The long record length digital oscilloscope of claim 16 wherein:

data representative of said predetermined event is input to said processor by a user for causing said processor to produce said event detect signal upon detection of said event.

18. The long record length digital oscilloscope of claim 17 wherein:

said processor is responsive to input by a user for changing said data representative of said predetermined event;

said input by said user is accepted by said processor before or during said examination of said data record.

19. The long record length digital oscilloscope of claim 18 wherein:

said predetermined amount of stored digital samples represents a frame of samples surrounding said second trigger event, and a magnitude of said predetermined amount of stored digital signals is controllable by said user.

20. The long record length digital oscilloscope of claim 19 wherein:

said processor can be programmed to detect a plurality of different events; and

waveforms representative of data surrounding each of said respective different events are simultaneously displayed on a display screen of said oscilloscope.

21. The long record length digital oscilloscope of claim 20 wherein said processor is an FPGA.

22. The long record length digital oscilloscope of claim 21 wherein said processor is a microcomputer.

23. The long record length digital oscilloscope of claim 22 wherein said processor is an ASIC.

24. A long record length digital oscilloscope, comprising:

an input terminal for receiving a signal under test;

an analog-to-digital converter having an input coupled to said input terminal for receiving said signal under test, and producing digital samples of said signal under test at an output;

a trigger circuit having an input coupled to said input terminal for receiving said signal under test, and producing a trigger signal at an output in response to detection of a predetermined trigger event in said signal under test;

an acquisition memory for storing said digital samples of said signal under test in a data record;

a demultiplexer unit coupled between said analog-to-digital converter and said acquisition memory for receiving said digital samples and controlling the flow of said samples to said acquisition memory in response to said trigger signal received from said trigger circuit; and

a system processor for examining said stored digital samples in a post acquisition mode of operation for detecting a predetermined event in said stored digital samples;

said system processor causing a predetermined amount of said stored digital samples to be read from said acquisition memory and sent to a signal processing portion of said oscilloscope for processing and display in response to said detection of said predetermined event;

said predetermined amount of said stored digital samples being less than the whole data record and being related in time to said event detect signal.

25. The long record length digital oscilloscope of claim 24 wherein said oscilloscope has multiple channels:

each of said channels having a long record length memory associated therewith;

each of said long record length memories being concatenated with the others to form a single long record length memory;

said system processor being capable of being programmed to detect a plurality of predetermined events in data stored in said single long record length memory; and

waveforms representative of data surrounding each of said respective predetermined events are simultaneously displayed on a display screen of said oscilloscope.

26. The long record length digital oscilloscope of claim 25 wherein said system processor is an FPGA.

27. The long record length digital oscilloscope of claim 25 wherein said system processor is a microcomputer.

28. The long record length digital oscilloscope of claim 25 wherein said system processor is an ASIC.

29. A method for use in an oscilloscope for displaying a waveform of interest extracted from an acquisition of a long data record, comprising the steps of:

acquiring a long data record in an acquisition memory;

examining the data of the long data record in a post processing mode of operation for the occurrence of a user-defined event;

upon detection of such a predetermined event, applying data comprising an acquisition frame surrounding the event to a waveform processing and display system.

30. The method of claim 29 wherein:

said long data record is replayed to perform said examining and said applying steps throughout the data record using different predetermined search criteria; and

wherein

said applying step causes multiple ones of said waveforms of interest to be displayed simultaneously, each being captured as a result of a different user-defined event.

31. The method of claim 29 wherein

said long data record is replayed to perform said examining and said applying steps throughout the data record using a single search criterion;

and wherein

said applying step causes multiple ones of said waveforms of interest to be displayed simultaneously, each being captured as a result of a single user-defined event.