Tester channel to multiple IC terminals
First Claim
1. An apparatus for providing signal paths between integrated circuit (IC) tester channels and input and output pads residing on surfaces of a plurality of ICs, wherein the ICs are adapted to receive test signals via the input pads and to generate output signals at the output pads in response to the test signals, and wherein voltages of the test signals and the output signals represent logic states, the apparatus comprising:
- a first node; and
N first signal paths, wherein N is an integer greater than one, wherein each first signal path links a separate one of the output pads to the first node, such that a first signal is produced at the first node in response to a set of N output signals generated at the output pads linked to the first node, and wherein all N first signal paths have substantially differing resistances such that a voltage of the first signal has a unique magnitude for each unique combination of logic states of the set of N output signals.
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Accused Products
Abstract
A probe card provides signal paths between integrated circuit (IC) tester channels and probes accessing input and output pads of ICs to be tested. When a single tester channel is to access multiple (N) IC pads, the probe card provides a branching path linking the channel to each of the N IC input pads. Each branch of the test signal distribution path includes a resistor for isolating the IC input pad accessed via that branch from all other branches of the path so that a fault on that IC pad does not substantially affect the voltage of signals appearing on any other IC pad. When a single tester channel is to monitor output signals produced at N IC pads, the resistance in each branch of the signal path linking the pads of the tester channel is uniquely sized to that the voltage of the input signal supplied to the tester channel is a function of the combination of logic states of the signals produced at the N IC pads. The tester channel measures the voltage of its input signal so that the logic state of the signals produced at each of the N IC output pads can be determined from the measured voltage.
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Citations
21 Claims
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1. An apparatus for providing signal paths between integrated circuit (IC) tester channels and input and output pads residing on surfaces of a plurality of ICs, wherein the ICs are adapted to receive test signals via the input pads and to generate output signals at the output pads in response to the test signals, and wherein voltages of the test signals and the output signals represent logic states, the apparatus comprising:
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a first node; and
N first signal paths, wherein N is an integer greater than one, wherein each first signal path links a separate one of the output pads to the first node, such that a first signal is produced at the first node in response to a set of N output signals generated at the output pads linked to the first node, and wherein all N first signal paths have substantially differing resistances such that a voltage of the first signal has a unique magnitude for each unique combination of logic states of the set of N output signals. - View Dependent Claims (2, 3, 4)
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5. An apparatus for providing signal paths between integrated circuit (IC) tester channels and input pads and output pads residing on surfaces of a plurality of ICs, wherein the ICs are adapted to receive test signals via the input pads and to generate output signals at the output pads in response to the test signals, and wherein voltages of the test signals and the output signals represent logic states, the apparatus comprising:
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at least one substrate having a surface a first circuit node formed on said at least one substrate;
N first conductive pads formed on said surface, where N is an integer greater than 1;
N first probes, each first probe linking a separate one of N of said output pads to a corresponding one of the N first conductive pads; and
N first signal paths, each linking a corresponding one of the N first conductive pads to said first circuit node such that a first signal is produced at the first circuit node in response to a set of N output signals generated at the output pads linked to the first circuit node, all N first signal paths have substantially differing resistances such that a voltage of the first signal has a unique magnitude for each unique combination of logic states of the set of N output signals. - View Dependent Claims (6, 7, 8, 9, 10, 11, 12, 13, 19)
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14. An apparatus for testing integrated circuit (ICs), wherein the ICs have input pads at which the ICs receive test signals, and have output pads at which they produce output signals in response to the test signals, the test and output signals having voltages representing logic states, the apparatus comprising:
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a first circuit node;
N first signal paths, wherein N is an integer greater than one, wherein each first signal path links a separate one of the output pads to the first circuit node, and wherein each first signal path has a resistance differing substantially from a resistance of any other of the first signal paths, such that a first signal appears at the first circuit node having a first voltage representing a combination of logic states of the output signals produced by the output pads linked by the first signal paths to the first circuit node; and
a first IC tester channel linked to the first circuit node including means for measuring the first voltage of the first signal. - View Dependent Claims (15, 16, 17, 18)
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20. A method for testing at least one integrated circuit (IC) device wherein at least one IC device comprises a plurality of terminals at which said at least one IC device receives input signals and concurrently produces output signals, wherein voltages of the input and output signals represent logic states, the method comprising the steps of:
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a. providing a first circuit node;
b. providing a plurality of first signal paths, each first signal path linking a separate one of the plurality of terminals to the first circuit node, such that a first signal is produced at the first circuit node in response to IC output signals concurrently generated at each of the plurality of IC terminals, wherein all first signal paths have substantially differing resistances such that a voltage of the first signal produced at the first circuit node has a unique magnitude for each unique combination of logic states of the IC output signals produced at the plurality of IC terminals;
c. measuring a voltage of the first signal produced at the first circuit node; and
d. determining a logic state of each of the plurality of output signals from the voltage measured at step c. - View Dependent Claims (21)
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Specification