N-way RF power amplifier circuit with increased back-off capability and power added efficiency using selected phase lengths and output impedances

• US 20030210096A1
• Filed: 05/05/2003
• Published: 11/13/2003
• Est. Priority Date: 01/28/2002
• Status: Active Grant

• Current Assignee: MACOM Technology Solutions Holdings, Inc.
• Original Assignee: CREE Microwave, LLC
• Inventors: Pengelly, Raymond Sydney, Wood, Simon Maurice
• Granted Patent: US 6,791,417 B2
• Time in Patent Office: Days
• US Class Current: 330/295
• CPC Class Codes: H03F 1/0277 Selecting one or more amplifiers from a plurality of amplifiers
• CPC Class Codes: H03F 1/0288 using a main and one or several auxiliary peaking amplifiers whereby the load is connected to the main amplifier using an impedance inverter, e.g. Doherty amplifiers
• CPC Class Codes: H03F 1/32 Modifications of amplifiers to reduce non-linear distortion by negative feedback H03F1/34
• CPC Class Codes: H03F 2201/3203 the amplifier comprising means for back off control in order to reduce distortion
• CPC Class Codes: H03F 3/602 Combinations of several amplifiers

Abstract

An RF power amplifier circuit for amplifying an RF signal over a broad range of power with improved efficiency includes a carrier amplifier for amplifying an RF signal over a first range of power and with a power saturation level below the maximum of the broad range of power is disclosed. A plurality of peak amplifiers are connected in parallel with the carrier amplifier with each of the peak amplifiers being biased to sequentially provide an amplified output signal after the carrier amplifier approaches saturation. The input signal is applied through a signal splitter to the carrier amplifier and the plurality of peak amplifiers, and an output for receiving amplified output signals from the carrier amplifier and the plurality of peak amplifiers includes a resistive load R/2. The split input signal is applied through a 90° transformer to the carrier amplifier, and the outputs of the peak amplifiers are applied through 90° transformers to a output load. When operating below saturation, the carrier amplifier delivers power to a load of 2R and the carrier amplifier delivers current to the load, which is one-half the current at maximum power when the amplifier is saturated. In one embodiment with the output having an impedance, Z, the carrier amplifier and each peak amplifier is connected to the output through an output-matching network presenting an output impedance of less than Z to each amplifier and with each output-matching network having selected phase length to reduce reactance of the output impedance.

Claims

1. An RF power amplifier circuit for amplifying an RF signal over a broad range of power comprising:

a) a carrier amplifier for amplifying the RF signal over a first range of power and with a power saturation level below the maximum of the broad range of power,

b) a plurality of peak amplifiers connected in parallel with the carrier amplifier, each of the peak amplifiers being biased to sequentially provide an amplified output signal after the carrier amplifier approaches saturation,

c) a signal splitter for splitting an input signal and applying the split input signal to the carrier amplifier and to the plurality of peak amplifiers, and

d) an output for receiving and combining amplified output signals from the carrier amplifier and from the plurality of peak amplifiers, the output having an impedance, Z, the carrier amplifier and each of the peak amplifiers being connected to the output by an output matching network presenting a varying impedance to each amplifier dependent on that network'"'"'s impedance and effective phase length.

2. The RF power amplifier circuit as defined by claim 1, wherein the phase lengths of each output matching network are selected to reduce reactance of the output impedance.

3. The RF power amplifier circuit as defined by claim 1, wherein each peak amplifier extends efficient power amplification by 6 dB.

4. The RF power amplifier circuit as defined by claim 3, wherein the plurality of peak amplifiers is three peak amplifiers and the extended efficient power amplification is approximately 18 dB.

5. The RF power amplifier circuit as defined by claim 4, wherein each of the carrier amplifier and peak amplifiers comprises a lateral DMOS transistor.

6. The RF power amplifier circuit as defined by claim 1, wherein the signal splitter includes a quarter-wave transformer connected to the input of the carrier amplifier, and the output includes a resistive load connected to the output of the carrier amplifier and connected to the output of each peak amplifier through a quarter-wave transformer.

7. The RF power amplifier circuit as defined by claim 1, wherein each of the carrier amplifier and peak amplifiers comprises a transistor selected from the group consisting of lateral DMOS transistors, MESFETs, HEMTs, HBTs and bipolar transistors.

8. The RF power amplifier circuit as defined by claim 1, wherein the output includes a resistive load when connected to the output of the carrier amplifier and which is connected to the output of each peak amplifier through a quarter-wave transformer.

9. An RF power amplifier circuit for amplifying an RF signal over a range of power, comprising:

a) a carrier amplifier for amplifying the RF signal over a first range of power and with a power saturation level below the maximum of the range of power,

b) at least one peak amplifier connected in parallel with the carrier amplifier, the peak amplifier being biased to provide an amplified output signal after the carrier amplifier approaches saturation,

c) a signal splitter for splitting an input signal and applying the split input signal to the carrier amplifier and the at least one peak amplifier,

d) an output combiner node coupled to a power amplifier output having an impedance, Z, and

e) a plurality of output-matching networks connecting the carrier amplifier and the at least one peak amplifier to the output combiner node, each output-matching network presenting an output impedance to each amplifier of less than Z.

10. The RF power amplifier circuit as defined by claim 9, wherein the phase lengths of each output matching network are selected to reduce reactance of the output impedance.

11. The RF power amplifier circuit as defined by claim 9, further including an impedance transformer coupling the output combiner node to the power amplifier output for impedance transformation.

12. The RF power amplifier circuit as defined by claim 11, wherein each of the carrier amplifier and at least one peak amplifier comprises a transistor selected from the group consisting of lateral DMOS transistors, MESFETs, HEMTs, HBTs and bipolar transistors.

13. The RF power amplifier circuit as defined by claim 12, wherein the maximum RF output power is 180 watts.