Multichip wafer-level package and method for manufacturing the same
First Claim
1. A multichip wafer-level package comprising:
- a first chip having a semiconductor device, a first bonding pad ring surrounding the semiconductor device, a plurality of internal bonding pads disposed within the first bonding pad ring and electrically connected to the semiconductor device, and a plurality of external bonding pads disposed outside the first bonding pad ring and electrically connected to the semiconductor device for electrically connecting to an external circuit;
a second chip having an electronic device, a plurality of bonding pads electrically connected to the electronic device and corresponding to the internal bonding pads of the first chip, and a second bonding pad ring corresponding to the first bonding pad ring of the first chip;
a bump ring disposed between the first bonding pad ring of the first chip and the second bonding pad ring of the second chip for bonding the first and the second chips so as to form a cavity for accommodating the semiconductor device; and
a plurality of bumps electrically connecting the internal bonding pads of the first chip to the bonding pads of the second chip.
1 Assignment
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Accused Products
Abstract
A multichip wafer-level package comprises a first chip, a second chip, a bump ring and a plurality of bumps. The first chip has a semiconductor device, a first bonding pad ring surrounding the semiconductor device, a plurality of internal bonding pads disposed within the first bonding pad ring and electrically connected to the semiconductor device, and a plurality of external bonding pads disposed outside the first bonding pad ring and electrically connected to the semiconductor device for electrically connecting to an external circuit. The second chip has an electronic device, a plurality of bonding pads electrically connected to the electronic device and corresponding to the internal bonding pads of the first chip, and a second bonding pad ring corresponding to the first bonding pad ring of the first chip. The bump ring is disposed between the first bonding pad ring of the first chip and the second bonding pad ring of the second chip for bonding the first and the second chips so as to form a cavity for accommodating the semiconductor device. The bumps electrically connect the internal bonding pads of the first chip to the bonding pads of the second chip.
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Citations
18 Claims
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1. A multichip wafer-level package comprising:
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a first chip having a semiconductor device, a first bonding pad ring surrounding the semiconductor device, a plurality of internal bonding pads disposed within the first bonding pad ring and electrically connected to the semiconductor device, and a plurality of external bonding pads disposed outside the first bonding pad ring and electrically connected to the semiconductor device for electrically connecting to an external circuit;
a second chip having an electronic device, a plurality of bonding pads electrically connected to the electronic device and corresponding to the internal bonding pads of the first chip, and a second bonding pad ring corresponding to the first bonding pad ring of the first chip;
a bump ring disposed between the first bonding pad ring of the first chip and the second bonding pad ring of the second chip for bonding the first and the second chips so as to form a cavity for accommodating the semiconductor device; and
a plurality of bumps electrically connecting the internal bonding pads of the first chip to the bonding pads of the second chip. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A method for manufacturing multichip wafer-level package with a hermetical cavity, comprising following steps:
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providing a first wafer comprising a plurality of first chips wherein each first chip is spaced to one another by scribe lines and each chip has a semiconductor device, a bonding pad ring, a plurality of internal bonding pads disposed within the bonding pad ring and electrically connected to the semiconductor device, and a plurality of external bonding pads disposed outside the first bonding pad ring and electrically connected to the semiconductor device;
providing a second wafer comprising a plurality of second chips wherein each second chip is spaced to one another by scribe lines and each chip has a plurality of electronic devices, a plurality of bonding pads electrically connected to the electronic devices and corresponding to the internal bonding pads of the first chip, and a second bonding pad ring corresponding to the first bonding pad ring of the first chip;
forming a adhesion ring on the bonding pad ring of the first chip or the bonding pad ring of the second chip;
forming conductive bumps on the internal bonding pads of the first chip or bonding pads of the second chip;
aligning the first wafer with the second wafer and then bonding them together such that the adhesion ring connects the bonding pad ring of the first chip and the bonding pad ring of the second chip so as to form a hermetical cavity between the first chip and the second chip and such that the conductive bumps electrically connect the internal bonding pads of the first chip and the bonding pads of the second chip; and
cutting the first wafer and the second wafer along the scribe lines of the first wafer and the second wafer respectively so as to form packages individually. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18)
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Specification