Method and apparatus for disabling defective components in a computer system

• US 20030217256A1
• Filed: 04/14/2003
• Published: 11/20/2003
• Est. Priority Date: 05/17/2002
• Status: Active Grant

• Current Assignee: Oracle America, Inc. (Oracle Corporation)
• Original Assignee: Sun Microsystems Incorporated (Oracle Corporation)
• Inventors: Gilstrap, Raymond J., Gang, Fongyan, Gordon, David S., Hain, Daniel J.
• Granted Patent: US 7,137,020 B2
• Time in Patent Office: Days
• US Class Current: 713/100
• CPC Class Codes: G06F 11/2035 without idle spare hardware
• CPC Class Codes: G06F 11/2043 where the redundant components share a common memory address space

Abstract

A method for configuring a computer system includes identifying a defective component in the computer system; disabling at least the defective component; and dynamically reconfiguring the computer system to allow continued operation with the defective component disabled. A computer system includes a plurality of components and a system controller. The system controller is adapted to identify a defective component from the plurality of components, disable at least the defective component, and dynamically reconfigure the computer system to allow continued operation with the defective component disabled.

Claims

1. A method for configuring a computer system, comprising:

identifying a defective component in the computer system;

disabling at least the defective component; and

dynamically reconfiguring the computer system to allow continued operation with the defective component disabled.

2. The method of claim 1, further comprising:

generating a component map of components in the computer system, the component map including enable information regarding the components; and

accessing the component map to disable the defective component.

3. The method of claim 2, wherein the computer system comprises at least one field replaceable unit having a field replaceable unit identification memory adapted to store identification data associated with the field replaceable unit, and the method further comprises accessing the identification data to generate the component map.

4. The method of claim 2, wherein the computer system comprises at least one field replaceable unit comprising a plurality of components including the defective component, and the method further comprises accessing the component map to disable the defective component and enable at least a first subset of the components of the field replaceable unit other than the defective component.

5. The method of claim 4, wherein a second subset of the plurality of components is associated with the defective component, and the method further comprises accessing the component map to disable the second subset of the components associated with the defective component.

6. The method of claim 4, wherein the plurality of components comprises at least a processor and an associated memory device, and the method further comprises accessing the component map to disable the processor responsive to the memory device being the defective component and to disable the memory device responsive to the processor being the defective component.

7. The method of claim 4, wherein the plurality of components comprises a processor and a plurality of associated memory devices, the defective component comprising one of the plurality of associated memory devices, and the method further comprises accessing the component map to disable the defective memory device and enable the processor and the non-defective memory devices.

8. The method of claim 7, wherein the plurality of associated memory devices are arranged in banks, and the method further comprises accessing the component map to disable one of the plurality of associated memory devices in a common bank with the defective memory device.

9. The method of claim 1, wherein the computer system includes a field replaceable unit including the defective component, and disabling the component further comprises disabling the field replaceable unit.

10. The method of claim 9, wherein the field replaceable unit has an associated field replaceable unit identification memory configured to store error information associated with the field replaceable unit, and the method further comprises accessing the error information to set a defective error bit to disable the defective component.

11. The method of claim 1, wherein the computer system includes a field replaceable unit comprising a plurality of components including the defective component, and the method further comprises allowing continued operation of at least a portion of the plurality of components of the field replaceable unit other than the defective component.

12. The method of claim 11, wherein a subset of the plurality of components is associated with the defective component, and the method further comprises disabling the subset of components associated with the defective component.

13. The method of claim 11, wherein the field replaceable unit comprises a first field replaceable unit, and the defective component comprises a second filed replaceable unit having an associated field replaceable unit identification memory configured to store error information associated with the second field replaceable unit, and the method further comprises:

generating a component map of the components in the first field replaceable unit, the component map including enable information regarding the components;

accessing the component map to disable a subset of components associated with the defective component; and

accessing the error information in the associated field replaceable unit identification memory to set a defective error bit to disable the second field replaceable unit.

14. The method of claim 11, wherein the plurality of components comprises at least a processor and an associated memory device, and the method further comprises:

disabling the processor responsive to the memory device being the detective component; and

disabling the memory device responsive to the processor being the defective component.

15. The method of claim 11, wherein the plurality of components comprises a processor and a plurality of associated memory devices, the defective component comprising a defective memory device from the plurality of associated memory devices, and the method further comprises:

disabling the defective memory device; and

enabling the processor and the memory devices in the plurality of associated memory devices other than the defective memory device.

16. The method of claim 15, wherein the memory devices are arranged in banks, and the method further comprises disabling one of the plurality of associated memory devices in a common bank with the defective memory device.

17. The method of claim 15, wherein the field replaceable unit comprises a first field replaceable unit, and the defective memory device comprises a second field replaceable unit having an associated field replaceable unit identification memory configured to store error information associated with the second field replaceable unit, and the method further comprises:

generating a component map of the components in the first field replaceable unit, the component map including enable information regarding the components;

accessing the component map to disable the one of the plurality of associated memory devices in a common bank with the defective memory device; and

accessing the error information in the associated field replaceable unit identification memory to set a defective error bit to disable the defective memory device.

18. A computer system, comprising:

a plurality of components; and

a system controller adapted to identify a defective component from the plurality of components and dynamically reconfigure the computer system to allow continued operation with the defective component disabled.

19. The system of claim 18, further comprising a component map including enable information regarding the plurality of components, wherein the system controller is further configured to change the enable information associated with the defective component to disable the defective component.

20. The system of claim 19, further comprising at least one field replaceable unit having a field replaceable unit identification memory adapted to store identification data associated with the field replaceable unit, wherein the system controller is further configured to generate the component map based on the identification data.

21. The system of claim 19, further comprising at least one field replaceable unit comprising the plurality of components and including the defective component, and the system controller is further configured to access the component map to disable the defective component and enable at least a first subset of the plurality of components of the field replaceable unit other than the defective component.

22. The system of claim 21, wherein the system controller is further configured to access the component map to disable a second subset of the plurality of components associated with the defective component.

23. The system of claim 21, wherein the plurality of components comprises at least a processor and an associated memory device, and the system controller is further configured to access the component map to disable the processor responsive to the memory device being the defective component and to disable the memory device responsive to the processor being the defective component.

24. The system of claim 21, wherein the plurality of components comprises a processor and a plurality of associated memory devices, the defective component comprising one of the plurality of associated memory devices, and the system controller is further configured to access the component map to disable the defective memory device and enable the processor and the non-defective memory devices.

25. The system of claim 24, wherein the plurality of associated memory devices are arranged in banks, and the system controller is further configured to access the component map to disable one of the plurality of associated memory devices in a common bank with the defective memory device.

26. The system of claim 18, further comprising a field replaceable unit including the defective component, and the system controller is further configured to disable the field replaceable unit.

27. The system of claim 26, wherein the field replaceable unit has an associated field replaceable unit identification memory, and the system controller is further configured to set a defective error bit in the field replaceable unit identification memory to disable the defective component.

28. The system of claim 18, further comprising a field replaceable unit comprising the plurality of components and including the defective component, and the system controller is further configured to allow continued operation of at least a portion of the plurality of components of the field replaceable unit other than the defective component.

29. The system of claim 28, wherein the system controller is further configured to disable a subset of the plurality of components associated with the defective component.

30. The system of claim 28, wherein the field replaceable unit comprises a first field replaceable unit, and the defective component comprises a second field replaceable unit having an associated field replaceable unit identification memory configured to store error information associated with the second field replaceable unit, and the controller is further configured to generate a component map including enable information regarding the components in the first field replaceable unit, access the component map to disable a subset of the plurality of components associated with the defective component, and access the error information in the associated field replaceable unit identification memory to set a defective error bit to disable the second field replaceable unit.

31. The system of claim 28, wherein the plurality of components comprises at least a processor and an associated memory device, and the system controller is further configured to disable the processor responsive to the memory device being the defective component and disable the memory device responsive to the processor being the defective component.

32. The system of claim 28, wherein the plurality of components comprises a processor and a plurality of associated memory devices, the defective component comprising a defective memory device from the plurality of associated memory devices, and the system controller is further configured to disable the defective memory device and enable the processor and the memory devices in the plurality of associated memory devices other than the defective memory device.

33. The system of claim 32, wherein the memory devices are arranged in banks, and the system controller is further configured to disable one of the plurality of associated memory devices in a common bank with the defective memory device.

34. The system of claim 32, wherein the field replaceable unit comprises a first field replaceable unit and the defective memory device comprises a second field replaceable unit having an associated field replaceable unit identification memory configured to store error information associated with the second field replaceable unit, and the system controller is further configured to generate a component map of the components in the first field replaceable unit, the component map including enable information regarding the plurality of components, access the component map to disable the one of the plurality of associated memory devices in a common bank with the defective memory device, and access the error information in the associated field replaceable unit identification memory to set a defective error bit to disable the defective memory device.

35. An apparatus for configuring a computer system, comprising:

means for identifying a defective component in the computer system;

means for disabling at least the defective component; and

means for dynamically reconfiguring the computer system to allow continued operation with the defective component disabled.