Optimization methods for on-chip interconnect geometries suitable for ultra deep sub-micron processes
First Claim
1. A method of establishing a set of parameter values for use in simulating the operation of an integrated circuit, the integrated circuit being formed of a structure comprising a conductive layer formed upon a substrate and a plurality of interconnect layers formed over the conductive layer, and including inter-layer and intra-layer dielectrics and a dielectric layer over the topmost of the interconnect layers, the method including:
- for a first portion of the structure, characterized by a first subset of the parameters and including a first of said layers and a second layer adjacent to the first layer, optimizing the first portion of the structure to establish values for the first subset of the parameters; and
for a second portion of the structure, characterized by a second subset of parameters and including the second of said layers and a third layer adjacent the second layer and distinct from the first, subsequently optimizing the second portion of the structure to establish values for the second subset, wherein the first and second subset share one or more of the parameters and the second subset is optimized holding the previously established values for the first subset fixed.
1 Assignment
0 Petitions
Accused Products
Abstract
The present invention presents optimization methods for interconnect geometries that readily extend to the UDSM region for determining on-chip interconnect process parameters more realistically and accurately than in the prior art. A method for reconstruction flow that re-assembles each of a number of optimized structures into one optimized interconnect process file, such as a process technology file for extractors. This optimized process technology file can use not only extracted interconnect process parameters but also the input of LPE (Layout Parasitic Extraction) tools in physical verification stage.
-
Citations
28 Claims
-
1. A method of establishing a set of parameter values for use in simulating the operation of an integrated circuit, the integrated circuit being formed of a structure comprising a conductive layer formed upon a substrate and a plurality of interconnect layers formed over the conductive layer, and including inter-layer and intra-layer dielectrics and a dielectric layer over the topmost of the interconnect layers, the method including:
-
for a first portion of the structure, characterized by a first subset of the parameters and including a first of said layers and a second layer adjacent to the first layer, optimizing the first portion of the structure to establish values for the first subset of the parameters; and
for a second portion of the structure, characterized by a second subset of parameters and including the second of said layers and a third layer adjacent the second layer and distinct from the first, subsequently optimizing the second portion of the structure to establish values for the second subset, wherein the first and second subset share one or more of the parameters and the second subset is optimized holding the previously established values for the first subset fixed. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22)
-
-
23. A computer readable storage device embodying a program of instructions executable by a computer to perform a method of establishing a set of parameter values for use in simulating the operation of an integrated circuit, the integrated circuit being formed of a structure comprising a conductive layer formed upon a substrate and a plurality of interconnect layers formed over the conductive layer, and including inter-layer and intra-layer dielectrics and a dielectric layer over the topmost of the interconnect layers, said method comprising:
-
for a first portion of the structure, characterized by a first subset of the parameters and including a first of said layers and a second layer adjacent to the first layer, optimizing the first portion of the structure to establish values for the first subset of the parameters; and
for a second portion of the structure, characterized by a second subset of parameters and including the second of said layers and a third layer adjacent the second layer and distinct from the first, subsequently optimizing the second portion of the structure to establish values for the second subset, wherein the first and second subset share one or more of the parameters and the second subset is optimized holding the previously established values for the first subset fixed. - View Dependent Claims (24, 25)
-
-
26. A method for transmitting a program of instructions executable by a computer to perform a process of establishing a set of parameter values for use in simulating the operation of an integrated circuit, the integrated circuit being formed of a structure comprising a conductive layer formed upon a substrate and a plurality of interconnect layers formed over the conductive layer, and including inter-layer and intra-layer dielectrics and a dielectric layer over the topmost of the interconnect layers, said process comprising:
-
for a first portion of the structure, characterized by a first subset of the parameters and including a first of said layers and a second layer adjacent to the first layer, optimizing the first portion of the structure to establish values for the first subset of the parameters; and
for a second portion of the structure, characterized by a second subset of parameters and including the second of said layers and a third layer adjacent the second layer and distinct from the first, subsequently optimizing the second portion of the structure to establish values for the second subset, wherein the first and second subset share one or more of the parameters and the second subset is optimized holding the previously established values for the first subset fixed. - View Dependent Claims (27, 28)
-
Specification