Display device

• US 20030230764A1
• Filed: 05/01/2003
• Published: 12/18/2003
• Est. Priority Date: 05/13/2002
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Osame, Mitsuaki, Murakami, Satoshi, Yamazaki, Shunpei
• Granted Patent: US 6,960,786 B2
• Time in Patent Office: Days
• US Class Current: 257/200
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1248 with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 29/4958 with a multiple layer structure
• CPC Class Codes: H01L 29/4966 the conductor material next to the insulator being a composite material, e.g. organic material, TiN, MoSi2 H01L29/4908, H01L29/4983 take precedence
• CPC Class Codes: H01L 29/78645 with multiple gate
• CPC Class Codes: H10K 2102/3026 Top emission
• CPC Class Codes: H10K 50/84 Passivation; Containers; Encapsulations
• CPC Class Codes: H10K 50/841 Self-supporting sealing arrangements
• CPC Class Codes: H10K 50/844 Encapsulations
• CPC Class Codes: H10K 50/856 comprising reflective means
• CPC Class Codes: H10K 59/12 Active-matrix OLED [AMOLED] displays
• CPC Class Codes: H10K 59/121 characterised by the geometry or disposition of pixel elements
• CPC Class Codes: H10K 59/1213 the pixel elements being TFTs
• CPC Class Codes: H10K 59/122 Pixel-defining structures or layers, e.g. banks
• CPC Class Codes: H10K 59/124 Insulating layers formed between TFT elements and OLED elements

Abstract

A display device according to the present invention includes: a planarization layer for insulating between a gate electrode etc. and a data wiring, a drain electrode, or the like of the transistor; and a barrier layer that is formed on an upper surface or lower surface of the planarization layer and at the same time, adapted to suppress diffusion of moisture or degassing components from the planarization layer. The display device adopts a device structure effective in reducing the plasma damage on the planarization layer by devising a positional relationship between the planarization layer and the barrier layer. Also, in combination with a novel structure as a structure for a pixel electrode, effects such as an increase in luminance can be provided as well.

Claims

1. A display device comprising:

a transistor formed over a substrate; and

a light emitting element electrically connected with the transistor, the transistor comprising;

an active layer comprising a semiconductor;

a gate insulating film formed in contact with the active layer;

a gate electrode adjacent to the active layer with the gate insulating film interposed therebetween;

a barrier layer formed over the active layer;

a planarization layer formed on the barrier layer; and

a drain electrode formed on the planarization layer,

the light emitting element comprising;

a pixel electrode in contact with an upper surface of the drain electrode on the planarization layer;

a light emitting member formed in contact with the pixel electrode; and

an opposing electrode facing the pixel electrode through the light emitting member, and

wherein the drain electrode is electrically connected with the active layer through a first opening formed in the gate insulating film and the barrier layer and a second opening formed in the planarization layer.

11. A display device according to any one of claims 1 to 9, wherein an end portion of the pixel electrode is covered with a resin film.

12. A display device according to any one of claims 1 to 9, wherein the pixel electrode comprises an oxide conductive film.

13. A display device according to any one of claims 1 to 9, wherein the pixel electrode comprises a metal film.

20. A display device according to any one of claims 1 to 9 and 14 to 16, wherein the barrier layer comprises a silicon nitride film.

21. A display device according to any one of claims 1 to 9 and 14 to 16, wherein the planarization layer comprises an inorganic insulating film formed by spin-coating.

22. A display device according to any one of claims 1 to 9 and 14 to 16, wherein the planarization layer comprises an inorganic insulating film leveled by polishing.

23. A display device according to any one of claims 1 to 9 and 14 to 16, wherein the display device is incorporated in at least one selected from the group consisting of a television, a digital camera, a personal computer, a mobile computer, an image reproducing apparatus, a goggle-type display, a video camera, and a cellular phone.

2. A display device comprising:

a transistor formed over a substrate; and

a light emitting element electrically connected with the transistor, the transistor comprising;

an active layer comprising a semiconductor;

a gate insulating film formed in contact with the active layer;

a gate electrode adjacent to the active layer with the gate insulating film interposed therebetween;

a planarization layer formed over the active layer;

a barrier layer formed on the planarization layer; and

a drain electrode formed on the barrier layer,

the light emitting element comprising;

a pixel electrode in contact with an upper surface of the drain electrode on the planarization layer;

a light emitting member formed in contact with the pixel electrode; and

an opposing electrode facing the pixel electrode through the light emitting member,

wherein the drain electrode is electrically connected with the active layer through a first opening formed in the gate insulating film and the barrier layer and a second opening formed in the planarization layer, and

wherein the barrier layer covers an upper surface of the planarization layer and a side surface of the second opening formed in the planarization layer.

3. A display device comprising:

a transistor formed over a substrate; and

a light emitting element electrically connected with the transistor, the transistor comprising;

an active layer comprising a semiconductor;

a gate insulating film formed in contact with the active layer;

a gate electrode adjacent to the active layer with the gate insulating film interposed therebetween;

a planarization layer formed over the active layer;

a barrier layer formed on the planarization layer; and

a drain electrode formed on the barrier layer,

the light emitting element comprising;

a pixel electrode in contact with an upper surface of the drain electrode on the planarization layer;

a light emitting member formed in contact with the pixel electrode; and

an opposing electrode facing the pixel electrode through the light emitting member,

wherein the drain electrode is electrically connected with the active layer through an opening formed in the gate insulating film, the planarization layer, and the barrier layer, and

wherein the barrier layer covers an upper surface of the planarization layer.

4. A display device comprising:

a transistor formed over a substrate; and

a light emitting element electrically connected with the transistor, the transistor comprising;

an active layer comprising a semiconductor;

a gate insulating film formed in contact with the active layer;

a gate electrode adjacent to the active layer with the gate insulating film interposed therebetween;

a barrier layer formed over the active layer;

a planarization layer formed on the barrier layer; and

a drain electrode formed on the planarization layer,

the light emitting element comprising;

a pixel electrode in contact with a lower surface of the drain electrode on the planarization layer;

a light emitting member formed in contact with the pixel electrode; and

an opposing electrode facing the pixel electrode through the light emitting member, and

wherein the drain electrode is electrically connected with the active layer through a first opening formed in the gate insulating film and the barrier layer and a second opening formed in the planarization layer.

5. A display device comprising:

a transistor formed over a substrate; and

a light emitting element electrically connected with the transistor, the transistor comprising;

an active layer comprising a semiconductor;

a gate insulating film formed in contact with the active layer;

a gate electrode adjacent to the active layer with the gate insulating film interposed therebetween;

a planarization layer formed over the active layer;

a barrier layer formed on the planarization layer; and

a drain electrode formed on the barrier layer,

the light emitting element comprising;

a pixel electrode in contact with a lower surface of the drain electrode on the planarization layer;

a light emitting member formed in contact with the pixel electrode; and

an opposing electrode facing the pixel electrode through the light emitting member,

wherein the drain electrode is electrically connected with the active layer through a first opening formed in the gate insulating film and the barrier layer and a second opening formed in the planarization layer, and

wherein the barrier layer covers an upper surface of the planarization layer and a side surface of the second opening formed in the planarization layer.

6. A display device comprising:

a transistor formed over a substrate; and

a light emitting element electrically connected with the transistor,

the transistor comprising;

an active layer comprising a semiconductor;

a gate insulating film formed in contact with the active layer;

a gate electrode adjacent to the active layer with the gate insulating film interposed therebetween;

a planarization layer formed over the active layer;

a barrier layer formed on the planarization layer; and

a drain electrode formed on the barrier layer,

the light emitting element comprising;

a pixel electrode in contact with a lower surface of the drain electrode on the planarization layer;

a light emitting member formed in contact with the pixel electrode; and

an opposing electrode facing the pixel electrode through the light emitting member,

wherein the drain electrode is electrically connected with the active layer through an opening formed in the gate insulating film, the planarization layer, and the barrier layer, and

wherein the barrier layer covers an upper surface of the planarization layer.

7. A display device comprising:

a transistor formed over a substrate; and

a light emitting element electrically connected with the transistor, the transistor comprising;

an active layer comprising a semiconductor;

a gate insulating film formed in contact with the active layer;

a gate electrode adjacent to the active layer with the gate insulating film;

a barrier layer formed over the active layer;

an insulating layer formed on the barrier layer;

a drain electrode formed on the insulating layer; and

a planarization layer formed on a source electrode or the drain electrode,

the light emitting element comprising;

a pixel electrode formed on the planarization layer and electrically connected with the drain electrode through an opening formed in the planarization layer;

a light emitting member formed in contact with the pixel electrode; and

an opposing electrode facing the pixel electrode through the light emitting member, and

wherein the drain electrode is electrically connected with the active layer through a first opening formed in the gate insulating film and the barrier layer and a second opening formed in the insulating layer.

10. A display device according to any one of claims 7 to 9, wherein an upper surface of the planarization layer is covered with a silicon nitride film.

8. A display device comprising:

a transistor formed over a substrate; and

a light emitting element electrically connected with the transistor, the transistor comprising;

an active layer comprising a semiconductor;

a gate insulating film formed in contact with the active layer;

a gate electrode adjacent to the active layer with the gate insulating film;

an insulating layer formed over the active layer;

a barrier layer formed on the insulating layer;

a drain electrode formed on the barrier layer; and

a planarization layer formed on the drain electrode,

the light emitting element comprising;

a pixel electrode formed on the planarization layer and electrically connected with the drain electrode through an opening formed in the planarization layer;

a light emitting member formed in contact with the pixel electrode; and

an opposing electrode facing the pixel electrode through the light emitting member,

wherein the drain electrode is electrically connected with the active layer through a first opening formed in the gate insulating film and the barrier layer and a second opening formed in the insulating layer, and

wherein the barrier layer covers an upper surface of the insulating layer and a side surface of the second opening formed in the insulating layer.

9. A display device comprising:

a transistor formed over a substrate; and

a light emitting element electrically connected with the transistor, the transistor comprising;

an active layer comprising a semiconductor;

a gate insulating film formed in contact with the active layer;

a gate electrode adjacent to the active layer with the gate insulating film interposed therebetween;

an insulating layer formed over the active layer;

a barrier layer formed on the insulating layer;

a drain electrode formed on the barrier layer; and

a planarization layer formed on the drain electrode,

the light emitting element comprising;

a pixel electrode formed on the planarization layer and electrically connected with the drain electrode through an opening formed in the planarization layer;

a light emitting member formed in contact with the pixel electrode; and

an opposing electrode facing the pixel electrode through the light emitting member,

wherein the drain electrode is electrically connected with the active layer through an opening formed in the gate insulating film, the insulating layer, and the barrier layer, and

wherein the barrier layer covers an upper surface of the insulating layer.

14. A display device comprising:

a transistor formed over a substrate; and

a light emitting element electrically connected with the transistor, the transistor comprising;

an active layer comprises a semiconductor;

a gate insulating film formed in contact with the active layer;

a gate electrode adjacent to the active layer with the gate insulating film interposed therebetween;

a barrier layer formed over the active layer;

a planarization layer formed on the barrier layer; and

a drain electrode formed on the planarization layer,

wherein the drain electrode comprises a laminate structure of a first metal film and a second metal film, and includes a portion where a part of the second metal film is removed to expose the first metal film,

the light emitting element comprising;

the portion where the first metal film is exposed;

a light emitting member formed in contact with the portion where the first metal film is exposed; and

an opposing electrode facing the portion where the first metal film is exposed through the light emitting member, and

wherein the drain electrode is electrically connected with the active layer through a first opening formed in the gate insulating film and the barrier layer and a second opening formed in the planarization layer.

17. A display device according to any one of claims 14 to 16, wherein a section of the second metal film in the portion where a part of the second metal film is removed to expose the first metal film and an upper surface of the second metal film form an obtuse angle therebetween.

18. A display device according to any one of claims 14 to 16, wherein a film thickness of the light emitting member is smaller than that of the second metal film.

19. A display device according to any one of claims 14 to 16, wherein a pixel portion is covered with a resin film except the portion where a part of the second metal film is removed to expose the first metal film.

15. A display device comprising:

a transistor formed over a substrate; and

a light emitting element electrically connected with the transistor, the transistor comprising;

an active layer comprising a semiconductor;

a gate insulating film formed in contact with the active layer;

a gate electrode adjacent to the active layer with the gate insulating film interposed therebetween;

a planarization layer formed over the active layer;

a barrier layer formed on the planarization layer; and

a drain electrode formed on the barrier layer,

wherein the drain electrode comprises a laminate structure of a first metal film and a second metal film, and includes a portion where a part of the second metal film is removed to expose the first metal film,

the light emitting element comprising;

the portion where the first metal film is exposed;

a light emitting member formed in contact with the portion where the first metal film is exposed; and

an opposing electrode facing the portion where the first metal film is exposed through the light emitting member, and

wherein the barrier layer covers an upper surface of the planarization layer and a side surface of an opening formed in the insulating layer.

16. A display device comprising:

a transistor formed over a substrate; and

a light emitting element electrically connected with the transistor, the transistor comprising;

an active layer comprising a semiconductor;

a gate insulating film formed in contact with the active layer;

a gate electrode adjacent to the active layer with the gate insulating film interposed therebetween;

a planarization layer formed over the active layer;

a barrier layer formed on the planarization layer; and

a drain electrode formed on the barrier layer,

wherein the drain electrode comprises a laminate structure of a first metal film and a second metal film, and includes a portion where a part of the second metal film is removed to expose the first metal film,

the light emitting element comprising;

the portion where the first metal film is exposed;

a light emitting member formed in contact with the portion where the first metal film is exposed; and

an opposing electrode facing the portion where the first metal film is exposed through the light emitting member,

wherein a source electrode and the drain electrode are electrically connected with the active layer through an opening formed in the gate insulating film, the insulating layer, and the barrier layer, and

wherein the barrier layer covers an upper surface of the planarization layer.