DIGITALLY CONTROLLABLE NONLINEAR PRE-EQUALIZER

• US 20030231057A1
• Filed: 06/17/2002
• Published: 12/18/2003
• Est. Priority Date: 06/17/2002
• Status: Active Grant

• Current Assignee: The Boeing Co.
• Original Assignee: The Boeing Co.
• Inventors: Cooper, Thomas, Bach, Susan E., Hiramoto, Remy O., Kubasek, Suzanne E.
• Granted Patent: US 6,674,326 B1
• Time in Patent Office: Days
• US Class Current: 330/149
• CPC Class Codes: H03F 1/3223 using feed-forward H03F1/3211 takes precedence
• CPC Class Codes: H03F 3/58 using travelling-wave tubes

Abstract

A digitally controllable nonlinear pre-equalizer system receiving an input signal and generating an output signal, the system including a splitter for dividing the input signal into a first signal path and a second signal path, an attenuator and a time delay element in the first signal path, the attenuator and the time delay element operable to generate a linear signal, a mixer and a vector modulator in the second signal path, the mixer being responsive to a signal from a digital to analog converter coupled to a processor chip providing a digital signal to the digital to analog converter, the mixer and vector modulator operable to generate a nonlinear signal, and a summer for summing the linear signal and the nonlinear signal to generate the output signal.

Claims

1. A digitally controllable nonlinear pre-equalizer circuit receiving an input signal and generating an output signal, the circuit comprising:

a splitter for dividing the input signal into a first signal path and a second signal path;

an attenuator and a time delay element in the first signal path, the attenuator and the time delay element operable to generate a linear signal;

a mixer and a vector modulator in the second signal path, the mixer being responsive to a signal from a digital to analog converter coupled to a processor chip providing a digital signal to the digital to analog converter, the mixer and vector modulator operable to generate a nonlinear signal; and

a summer for summing the linear signal and the nonlinear signal to generate the output signal.

2. The circuit of claim 1, wherein the processor chip is operable to store a plurality of power amplifier parameters corresponding to a plurality of power amplifiers, each power amplifier parameter being provideable as the digital signal to the digital to analog converter.

3. The circuit of claim 1, wherein the vector modulator is operable to adjust a phase and amplitude of the nonlinear signal.

4. The circuit of claim 1, wherein the output signal is a gain expansion signal having nonlinearities that extrapolate to provide linear performance of a power amplifier up to saturation.

5. A digitally controllable nonlinear pre-equalizer circuit receiving an input signal and generating an output signal, the circuit comprising:

a splitter for dividing the input signal into a first signal path and a second signal path;

an attenuator and a time delay element in the first signal path, the attenuator and the time delay element operable to generate a linear signal;

a mixer and a vector modulator in the second signal path, the mixer being responsive to a signal from a digital to analog converter coupled to a processor chip providing a digital signal to the digital to analog converter, the processor chip being operable to store a plurality of power amplifier parameters corresponding to a plurality of power amplifiers, each power amplifier parameter being provideable as the digital signal, the mixer and vector modulator operable to generate a nonlinear signal; and

a summer for summing the linear signal and the nonlinear signal to generate the output signal.

6. The circuit of claim 5, wherein the vector modulator is operable to adjust a phase and amplitude of the nonlinear signal.

7. An amplifier system receiving an input signal and generating an output signal comprising:

a power amplifier;

a splitter for dividing the input signal into a first signal path and a second signal path;

an attenuator and a time delay element in the first signal path, the attenuator and the time delay element operable to generate a linear signal;

a mixer and a vector modulator in the second signal path, the mixer being responsive to a signal from a digital to analog converter coupled to a processor chip providing a digital signal to the digital to analog converter, the mixer and vector modulator operable to generate a nonlinear signal; and

a summer for summing the linear signal and the nonlinear signal to generate a gain expansion signal, the gain expansion signal being input to the power amplifier, the power amplifier providing the output signal.

8. The amplifier system of claim 7, wherein the processor chip is operable to store a plurality of power amplifier parameters corresponding to a plurality of power amplifiers, each power amplifier parameter being provideable as the digital signal to the digital to analog converter.

9. The amplifier system of claim 7, wherein the vector modulator is operable to adjust a phase and amplitude of the nonlinear signal.

10. The amplifier system of claim 7, the gain expansion signal having nonlinearities that extrapolate to provide linear performance of a power amplifier up to saturation.

11. A satellite system receiving an input signal and generating an output signal comprising:

a satellite;

a power amplifier disposed on said satellite;

a nonlinear pre-equalizer circuit coupled to said power amplifier, said nonlinear pre-equalizer circuit including,

a splitter for dividing the input signal into a first signal path and a second signal path;

an attenuator and a time delay element in the first signal path, the attenuator and the time delay element operable to generate a linear signal;

a mixer and a vector modulator in the second signal path, the mixer being responsive to a signal from a digital to analog converter coupled to a processor chip providing a digital signal to the digital to analog converter, the mixer and vector modulator operable to generate a nonlinear signal; and

a summer for summing the linear signal and the nonlinear signal to generate a gain expansion signal, the gain expansion signal being input to the power amplifier, the power amplifier providing the output signal.

12. The satellite system of claim 11, wherein the processor chip is operable to store a plurality of power amplifier parameters corresponding to a plurality of power amplifiers disposed on said satellite, each power amplifier parameter being provideable as the digital signal to the digital to analog converter.

13. The system of claim 11, wherein the vector modulator is operable to adjust a phase and amplitude of the nonlinear signal.

14. The system of claim 11, the gain expansion signal having nonlinearities that extrapolate to provide linear performance of a power amplifier up to saturation.

15. A method of digitally controlling a nonlinear pre-equalizer circuit receiving an input signal and generating an output signal, the method comprising:

dividing the input signal into a first signal path and a second signal path;

generating a linear signal by attenuating and time delaying the divided input signal in the first signal path;

generating a nonlinear signal by mixing and phase shifting the divided input signal in the second signal path, the mixing being responsive to a signal provided by a digital to analog converter coupled to a processor chip; and

summing the linear signal and the nonlinear signal to generate the output signal.

16. The method of claim 15, wherein the processor chip is operable to store a plurality of power amplifier parameters corresponding to a plurality of power amplifiers, each power amplifier parameter being provideable as the digital signal to the digital to analog converter.

17. The method of claim 15, wherein the vector modulator is operable to adjust a phase and amplitude of the nonlinear signal.

18. The method of claim 15, wherein the output signal is a gain expansion signal having nonlinearities that extrapolate to provide linear performance of a power amplifier up to saturation.