Efficient supply enhancement circuitry for power amplifiers

• US 20030231062A1
• Filed: 04/18/2003
• Published: 12/18/2003
• Est. Priority Date: 06/03/2002
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Paragon Communications Limited
• Inventors: Bar-David, Israel, Blayvas, Ilya
• Granted Patent: US 6,831,519 B2
• Time in Patent Office: Days
• US Class Current: 330/297
• CPC Class Codes: H03F 1/0211 with control of the supply voltage or current
• CPC Class Codes: H03F 1/0244 Stepped control
• CPC Class Codes: H03F 2200/504 the supply voltage or current being continuously controlled by a controlling signal, e.g. the controlling signal of a transistor implemented as variable resistor in a supply path for, an IC-block showed amplifier

Abstract

Circuitry for allowing efficient pulse-type enhancement of the voltage supplied to a power amplifier fed by a power supply that is connected to the power amplifier at a first feeding point through a main supply path that is connected via a component having high impedance to an enhancement pulse at the feeding point, and to a second feeding point.

Claims

1. A method for allowing efficient pulse-type enhancement of the voltage supplied to a power amplifier fed by a power supply being connected to said power amplifier at a first feeding point through a main supply path connected via a component having a high impedance to an enhancement pulse at said feeding point, and to a second feeding point, comprising:

a) providing a supplementary supply path for providing enhanced operating voltage to said power amplifier from a power supply;

b) providing a pair of a first and a second controllable impedances being connected by a common contact, each of which being capable of being in a non-conducting state or in a variable level of conduction;

c) connecting one contact of said first controllable impedance to said second feeding point;

d) connecting a power supply across the contacts of said pair which are not connected at said common contact;

e) connecting a capacitor between said common contact and said first feeding point;

f) during the time period when no enhancement is required, simultaneously causing said first controllable impedance to be in its conducting state and effectively connect said common contact to said second feeding point of said, or another power supply, and said second controllable impedance to be in its non-conducting state and thereby, effectively disconnecting said common contact from said second feeding point and allowing said capacitor to charge to essentially the voltage of said power supply;

g) during the time period when enhancement is required;

g.1) causing said first controllable impedance to effectively disconnect said common contact from one contact of said, or another power supply and;

g.2) simultaneously, controlling said second controllable impedance to be in a conduction level that corresponds to a desired enhancement voltage at said first feeding point, thereby increasing the magnitude of the voltage at said common point, to which a contact of said capacitor is connected, and thereby causing an essentially similar increase in the voltage at said first feeding point, to which the other contact of said capacitor is connected.

2. A method according to claim 1, wherein the controllable impedance comprises a bipolar transistor.

3. A method according to claim 1, wherein the controllable impedance comprises a FET.

4. A method according to claim 1, wherein the component comprises an inductor.

5. A method according to claim 1, wherein the component comprises a diode.

6. A method according to claim 1, wherein during the time period when enhancement is required, the first and/or the second controllable impedances are controlled by pulse signals having a duration which is essentially similar to said time period.

7. Circuitry for allowing efficient pulse-type enhancement of the voltage supplied to a power amplifier fed by a power supply being connected to said power amplifier at a first feeding point through a main supply path connected via a component having a high impedance to an enhancement pulse at said feeding point, and to a second feeding point, comprising:

h) a supplementary supply path for providing enhanced operating voltage to said power amplifier from a power supply;

i) a pair of a first and a second controllable impedances being connected by a common contact, each of which being capable of being in a non-conducting state or in a variable level of conduction, one contact of said first controllable impedance being connected to said second feeding point;

j) a power supply connected across the contacts of said pair, which are not connected at said common contact, for providing enhanced operating voltage to said power amplifier;

k) a capacitor being connected between said common contact and said feeding point, for supplying at least a portion of said enhancement voltage through said feeding point during said time period;

l) circuitry for, simultaneously causing said first controllable impedance to be in its conducting state and effectively connect said common contact to said second feeding point of said, or another power supply, and said second controllable impedance to be in its non-conducting state, during the time period when no enhancement is required, and for causing said first controllable impedance to effectively disconnect said common contact from one contact of said, or another power supply and for simultaneously, controlling said second controllable impedance to be in a conduction level that corresponds to a desired enhancement voltage at said first feeding point, during the time period when enhancement is required.

8. Circuitry according to claim 7, wherein the controllable impedance comprises a bipolar transistor.

9. Circuitry according to claim 7, wherein the controllable impedance comprises a FET.

10. Circuitry according to claim 7, wherein the component comprises an inductor.

11. Circuitry according to claim 7, wherein the component comprises a diode.

12. Circuitry according to claim 7, wherein during the time period when enhancement is required, the first and/or the second controllable impedances are controlled by pulse signals having a duration which is essentially similar to said time period.