Variable rate modulator

• US 20030231067A1
• Filed: 06/25/2003
• Published: 12/18/2003
• Est. Priority Date: 04/16/1997
• Status: Active Grant

• Current Assignee: Avago Technologies General IP PTE Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Hawley, Robert A., Joshi, Robindra B., Liu, Huan-Chang
• Granted Patent: US 6,870,429 B2
• Time in Patent Office: Days
• US Class Current: 331/16
• CPC Class Codes: H04L 27/362 Modulation using more than one carrier, e.g. with quadrature carriers, separately amplitude modulated H04L27/366 takes precedence

Abstract

Clock signals and digital data signals at a variable frequency are introduced to the input of a FIFO and are passed from the FIFO at a second (or intermediate) frequency controlled by a numerically controlled oscillator. To regulate the frequency of the signals from the numerically controlled oscillator, the phases of the clock signals at the variable frequency are compared in a phase detector with the phases of the signals from the numerically controlled oscillator to generate an error signal. The error signals and the signals at a fixed sampling frequency higher than the intermediate frequency regulate the frequency of the signals from the numerically controlled oscillator and thus the frequency of the digital data signals from the FIFO. The digital data signals from the FIFO are converted to a pair of signals at the second frequency. The pair of signals at the second frequency have individual ones of a plurality of analog levels dependent upon a code indicated by successive pairs of the digital data signals. The signals at the second (or intermediate) frequency modulate a pair of trigonometrically related signals at the fixed sampling frequency. The modulated signals at the fixed sampling frequency are combined and the combined signals are sampled at the fixed sampling frequency to corresponding analog values by a digital-to-analog converter.

Claims

1. A signal processing system having a variable frequency input clock comprising:

phase detection means for generating an error signal representing phase difference between said variable frequency input clock and a first clock,

filtering means coupled to said phase detection means for filtering said error signal,

a numerically controlled oscillator, responsive to said filtered error signal and a sample clock for providing said first clock; and

buffering means for receiving an input signal at the variable frequency input clock and responsive to said first clock, outputting a data signal at said first clock.

2. The signal processing system of claim 1 further comprising interpolation means coupled to the buffer means, wherein said interpolation means is responsive to a phase offset signal representing an offset in phase between the sample clock and the first clock.

3. The signal processing system of claim 2 further comprising a modulation means for modulating the interpolated signal with a trigonometric signal having a carrier frequency to form a modulated signal.

4. The signal processing system of claim 3 further comprising a digital to analog converter for converting said modulated signal to an analog signal.

5. A signal processing system comprising:

means for providing a first clock at a first clock frequency as a function of a sample clock having a sample clock frequency and a variable frequency input clock;

buffering means for receiving an input signal at the variable frequency input clock and, responsive to said first clock, outputting a data signal at said first clock frequency; and

interpolation means, responsive to a phase offset signal, representing an offset in phase between the sample clock and the first clock, coupled to the output of the buffering means for providing an interpolated signal at the sample clock frequency.

6. The signal processing system of claim 5 wherein the interpolation means interpolates the data signal by a non-integer value.

7. The signal processing system of claim 5 wherein the interpolation means interpolates the data signal by an integer value.

8. The signal processing system of claim 5 further comprising modulation means for modulating the interpolated signal with a trigonometric signal having a carrier frequency to form a modulated signal.