Current-driven light-emitting display apparatus and method of producing the same

• US 20030231273A1
• Filed: 06/20/2003
• Published: 12/18/2003
• Est. Priority Date: 02/17/1997
• Status: Abandoned Application

• Current Assignee: Seiko Epson Corporation (Seiko Group)
• Original Assignee: Seiko Epson Corporation (Seiko Group)
• Inventors: Kimura, Mutsumi, Itoh, Tomoyuki
• Application Number:
  US10/465,878
• Publication Number:
  US 20030231273A1
• Time in Patent Office: Days
• US Class Current: 349/139
• CPC Class Codes: G09G 2300/0417 Special arrangements specific to the use of low carrier mobility technology
• CPC Class Codes: G09G 2300/0439 Pixel structures
• CPC Class Codes: G09G 2300/0819 used for counteracting undesired variations, e.g. feedback or autozeroing
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2300/0866 by means of changes in the pixel supply voltage
• CPC Class Codes: G09G 2300/0876 Supplementary capacities in pixels having special driving circuits and electrodes instead of being connected to common electrode or ground; Use of additional capacitively coupled compensation electrodes
• CPC Class Codes: G09G 2310/06 Details of flat display driving waveforms
• CPC Class Codes: G09G 2320/043 Preventing or counteracting the effects of ageing
• CPC Class Codes: G09G 3/3225 using an active matrix
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element
• CPC Class Codes: G09G 3/3266 Details of drivers for scan electrodes
• CPC Class Codes: G09G 3/3291 in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H05B 44/00 Circuit arrangements for operating electroluminescent light sources for operating light emitting diodes H05B45/00
• CPC Class Codes: H10K 2102/3026 Top emission
• CPC Class Codes: H10K 50/81 Anodes
• CPC Class Codes: H10K 50/828 Transparent cathodes, e.g. comprising thin metal layers
• CPC Class Codes: H10K 59/12 Active-matrix OLED [AMOLED] displays
• CPC Class Codes: H10K 59/123 Connection of the pixel electrodes to the thin film transistors [TFT]
• CPC Class Codes: Y02B 20/30 Semiconductor lamps, e.g. solid state lamps [SSL] light emitting diodes [LED] or organic LED [OLED]

Abstract

A method for producing an organic EL display device is disclosed. The display device comprises a substrate, a transistor disposed on the substrate, a flattened inter-layer insulation film covering the transistor, a pixel electrode, and an organic EL layer.

Claims

1. A method for producing a display, the steps comprising:

forming a transistor on a substrate;

forming and flattening an inter-layer insulation film over the transistor, forming a contact hole in the inter-layer insulation film;

forming a pixel electrode on the inter-layer insulation film; and

forming an organic EL layer in a pixel region corresponding to the pixel electrode, the transistor being connected to the pixel electrode through the contact hole.

4. The method according to claim 1, further comprising forming a bank layer for defining the pixel region.

5. The method according to claim 1, the forming of the organic EL layer being performed by an ink-jet method.

2. A method for producing a display, the steps comprising:

forming a transistor on a substrate;

forming a first inter-layer insulation film over the transistor;

forming and flattening a second inter-layer insulation film over the first inter-layer insulation film;

forming a pixel electrode on the flattened second inter-layer insulation film;

forming an organic EL layer in a pixel region corresponding to the pixel electrode; and

forming a contact hole in the first inter-layer insulation film and the second inter-layer insulation film, the transistor being connected to the pixel electrode through the contact hole.

3. A method for producing a display, the steps comprising:

forming a transistor on a substrate;

forming a first inter-layer insulation film over the transistor;

forming a first contact hole in the first inter-layer insulation film, the transistor being connected to an electrode layer through the first contact hole;

forming and flattening a second inter-layer insulation film over the first inter-layer insulation film and the electrode layer;

forming a pixel electrode on the second inter-layer insulation film after the flattening process of the second inter-layer insulation film;

forming an organic EL layer in a pixel region corresponding to the pixel electrode; and

forming a second contact hole in the second inter-layer insulation film, the transistor being connected to the pixel electrode through the second contact hole.

6. A display, comprising:

a substrate;

a transistor disposed on the substrate;

a flattened inter-layer insulation film covering the transistor;

a pixel electrode formed on the flattened inter-layer insulation film; and

an organic EL layer disposed between the pixel electrode and a counter electrode.

7. The display according to claim 6, further comprising a contact hole, the transistor being connected to the pixel electrode through the contact hole.

8. The display according to claim 6, the organic EL layer being surrounded by a bank layer.

9. The display according to claim 8, the bank layer being formed on the inter-layer insulation film.