Electronic gain cell based charge sensor

• US 20030231531A1
• Filed: 03/19/2003
• Published: 12/18/2003
• Est. Priority Date: 03/19/2002
• Status: Active Grant

• Current Assignee: Cornell Research Foundation Incorporated (Cornell University)
• Original Assignee: Cornell Research Foundation Incorporated (Cornell University)
• Inventors: Tiwari, Sandip, Baxter, Gregory T.
• Granted Patent: US 6,953,958 B2
• Time in Patent Office: Days
• US Class Current: 365/200
• CPC Class Codes: B82Y 10/00 Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
• CPC Class Codes: G11C 11/54 using elements simulating biological cells, e.g. neuron
• CPC Class Codes: G11C 13/0014 comprising cells based on organic memory material
• CPC Class Codes: G11C 13/02 using elements whose operation depends upon chemical change G11C13/0009 takes precedence
• CPC Class Codes: G11C 2216/08 Nonvolatile memory wherein data storage is accomplished by storing relatively few electrons in the storage layer, i.e. single electron memory
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A gated metal oxide semiconductor field effect transistor (MOSFET) gain cell is formed with a flow channel for molecule flow. The flow channel is formed under the gate, and between a source and drain of the transistor. The molecule flow modulates a gain of the transistor. Current flowing between the source and drain is representative of charges on the molecules flowing through the flow channel. A plurality of individually addressable gain cells are coupled between chambers containing samples to measure charges on molecules in the samples passing through the gain cells.

Claims

1. A gain cell for detecting molecular charges, the cell comprising:

a substrate;

a drain and source formed on the substrate;

a gate formed at least partially between the drain and source; and

a flow channel formed proximate the gate.

2. The gain cell of claim 1 wherein the gain cell comprises a gated metal oxide semiconductor field effect transistor.

3. The gain cell of claim 2 wherein the flow channel is formed between the gate and an electron channel of the transistor.

4. The gain cell of claim 3 wherein the flow channel is approximately 5-20 nanometers long and approximately 1-10 nanometers in cross section.

5. The gain cell of claim 4 wherein the gain cell detects charges from molecular species moving through the flow channel that are approximately sub 10 nanometers in size.

6. The gain cell of claim 1 wherein the gain cell comprises a thin-silicon channel transistor.

7. The gain cell of claim 6 wherein the flow channel is formed beneath the thin-silicon channel.

8. The gain cell of claim 7 wherein the flow channel is approximately 5 nanometers and larger in length and approximately 40-400 nanometers in cross section.

9. The gain cell of claim 8 wherein the gain cell detects charges from molecular species moving through the flow channel that are larger than approximately 10 nanometers in size.

10. A method of forming a gain cell, the method comprising:

forming a transistor having a gate, a source and a drain; and

forming a fluid flow channel proximate the gate.

11. The method of claim 10 wherein the fluid flow channel has a cross section, and wherein the cross section is reduced in size by oxidation.

12. The method of claim 10 wherein the fluid flow channel is formed between the gate and an electron channel.

13. The method of claim 10 wherein the fluid flow channel is formed underneath a thin-silicon electron flow channel.

14. A method of forming a gain cell, the method comprising:

forming a silicon electron channel on a silicon-on-insulator substrate;

defining a gate and flow channel region;

isolating the gate region;

forming a via to the flow channel region; and

selectively etching the flow channel region through the via.

15. The method of claim 14 and further comprising reducing the size of the flow channel region.

16. The method of claim 15 wherein the flow channel region is reduced in size by oxidation.

17. The method of claim 16 and further comprising filling the flow channel region with nitride.

18. The method of claim 17 and further comprising chemical-mechanical polishing to obtain a smooth surface.

19. The method of claim 14 wherein the channel region comprises nitride, and wherein the flow channel region is etched using hot phosphoric acid.

20. The method of claim 14 and further comprising connecting fluid reservoirs to the flow channel.

21. The method of claim 18 wherein defining a gate and flow channel region comprises doping and annealing to from source, drain and gate regions.

22. A method of forming a gain cell, the method comprising:

using a silicon on insulator substrate, removing oxide under the silicon to form an opening;

filling the opening with a selectively etchable material;

defining a channel region including a source and drain;

forming a gate and channel region;

isolating the gate region from the channel;

forming a hole to the selectively etchable material; and

etching the selectively etchable material to form a flow channel.

23. The method of claim 22 and further comprising reducing the size of the flow channel region.

24. The method of claim 23 wherein the flow channel region is reduced in size by oxidation.

25. The method of claim 22 wherein the selectively etchable material comprises nitride.

26. The method of claim 22 wherein the oxide is removed using a buffered HF solution to undercut the oxide.

27. The method of claim 22 and further comprising growing oxide in the opening prior to filling the opening.

28. The method of claim 22 and further comprising connecting fluid reservoirs to the flow channel.

29. The method of claim 22 wherein defining a gate and flow channel region comprises doping and annealing to from source, drain and gate regions.

30. A measurement device comprising:

a first chamber for holding a sample; and

a transistor coupled to the first chamber and having a flow channel proximate a gate.

31. The device of claim 30 and further comprising a second chamber coupled to the transistor for receiving portions of the sample traversing the flow channel.

32. The device of claim 30 and further comprising multiple transistors having flow channels coupled to the first chamber.

33. The device of claim 32 and further comprising current measuring circuits coupled to the transistors to measure current flowing through the transistors as affected by molecules flowing through the flow channels of the transistors.

34. A measurement device comprising:

a sample chamber;

a first waste chamber coupled to the sample chamber;

a buffer chamber;

a second waste chamber coupled to the buffer chamber; and

a plurality of field effect transistors coupled between the chambers, each transistor having a flow channel proximate to a gate, wherein molecules flowing through the flow channel modulate the gain of the transistors.

35. The device of claim 34 wherein the field effect transistor comprises a front channel flow device.

36. The device of claim 34 wherein the field effect transistor comprises a back channel flow device.

37. The device of claim 34 and further comprising means for providing a positive pressure across the transistor flow channels.

38. A method of reading nucleotide sequences, the method comprising:

passing elongated nucleic acid molecules through fluid channels proximate a gate of a field effect transistor; and

measuring current flowing through the field effect transistor.

39. A method of detecting macromolecules, the method comprising:

passing macromolecules through fluid channels proximate a gate of a field effect transistor; and

measuring current flowing through the field effect transistor.

40. A method of sequencing a target genome, the method comprising:

fragmenting a genome;

passing the fragments of the genome through fluid channels proximate a gate of a field effect transistor;

measuring current flow through the field effect transistor to obtain sequence data; and

assembling the sequence data for the target genome.

41. The method of claim 40 wherein the fragments of the genome are passed through multiple such transistors in parallel.