Integrated circuit package and method of manufacturing the integrated circuit package

• US 20030234454A1
• Filed: 06/24/2002
• Published: 12/25/2003
• Est. Priority Date: 06/24/2002
• Status: Active Grant

• Current Assignee: Utac Headquarters Pte. Ltd (UTAC Holdings Ltd.)
• Original Assignee: ASAT Company Limited
• Inventors: Pedron, Serafin, McLellan, Neil Robert, Yee, Lin Tsui
• Granted Patent: US 6,940,154 B2
• Time in Patent Office: Days
• US Class Current: 257/787
• CPC Class Codes: H01L 21/561 Batch processing
• CPC Class Codes: H01L 2224/05554 being square
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48257 connecting the wire to a die pad of the item
• CPC Class Codes: H01L 2224/49171 Fan-out arrangements
• CPC Class Codes: H01L 2224/78301 Capillary
• CPC Class Codes: H01L 2224/85 using a wire connector
• CPC Class Codes: H01L 2224/85181 connecting first on the semiconductor or solid-state body, i.e. on-chip, regular stitch
• CPC Class Codes: H01L 2224/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 23/3107 the device being completely enclosed
• CPC Class Codes: H01L 23/49503 characterised by the die pad
• CPC Class Codes: H01L 23/49548 Cross section geometry H01L23/49562 takes precedence
• CPC Class Codes: H01L 23/49575 Assemblies of semiconductor devices on lead frames
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/49 of a plurality of wire connectors
• CPC Class Codes: H01L 24/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01046 : Palladium [Pd]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01058 : Cerium [Ce]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/10161 : with a rectangular active surface
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/18301 : being an anchoring portion, i.e. mechanical interlocking between the encapsulation resin and another package part

Abstract

The present invention relates to an integrated circuit package and method of manufacturing an integrated circuit package. In one aspect, the present invention relates to an integrated circuit package including a lead frame having a lead with an inner pad and an outer pad connected by a connection member, wherein a region of the inner pad and a region of the outer pad are separated by a channel extending through a width of the lead. Such an integrated circuit package further includes a semiconductor die electrically coupled with the inner pad of the lead, and an encapsulant material encapsulating at least a portion of said lead frame, wherein a portion of said outer pad is exposed. In another aspect, the present invention relates to a method including providing a matrix of lead frames, each of the lead frames having a lead, forming a channel extending through a width of the lead to create an inner pad, an outer pad and a connection member in the lead, electrically coupling a semiconductor die with the inner pad, and encapsulating at least a portion of the lead frame such that at least a portion of the outer pad is exposed.

Claims

1. An integrated circuit package, comprising:

a lead frame comprising a lead comprising an inner pad and an outer pad connected by a connection member, wherein a region of said inner pad and a region of said outer pad are separated by a channel extending through a width of said lead;

a semiconductor die electrically coupled with said inner pad of said lead; and

an encapsulant material encapsulating at least a portion of said lead frame, wherein a portion of said outer pad is exposed.

2. The integrated circuit package of claim 1, further comprising at least one wire attached between said semiconductor die and said inner pad.

3. The integrated circuit package of claim 2, wherein a length of said wire is about 150 mils or less.

4. The integrated circuit package of claim 1, wherein said connection member has a thickness that is approximately half a thickness of said lead.

5. The integrated circuit package of claim 1, wherein said connection member is integral with said inner pad.

6. The integrated circuit package of claim 5, wherein said connection member is integral with said outer pad.

7. The integrated circuit package of claim 1, wherein said lead is one of a plurality of inwardly projecting leads, each lead comprising an inner pad, and said inner pad of at least one of said leads projects further inward than another of said inner pads of said leads.

8. The integrated circuit package of claim 1, wherein said lead is one of a plurality of inwardly projecting leads, each lead comprising an inner pad and an outer pad, and a distance between adjacent inner pads is less than a distance between adjacent outer pads.

9. The integrated circuit package of claim 1, further comprising a solder member attached to said exposed portion of said outer pad.

10. The integrated circuit package of claim 1, wherein said lead is one of a plurality of inwardly projecting leads, each lead comprising an inner pad, and a width of at least one inner pad is less than a width of another inner pad.

11. The integrated circuit package of claim 1, wherein said encapsulant further encapsulates substantially all of said connection member.

12. The integrated circuit package of claim 1, further comprising a second semiconductor die electrically coupled with a second inner pad of a second lead.

13. The integrated circuit package of claim 1, wherein a thickness of said inner pad is substantially equal to a thickness of said outer pad.

14. An integrated circuit package, comprising:

a lead frame comprising a die attachment pad and a plurality of inwardly projecting leads, each of said leads comprising an inner pad and an outer pad, wherein a region of said inner pad and a region of said outer pad is separated by a channel extending through a width of said lead and connected by a connection member integral with said inner pad and said outer pad, said connection member having a thickness that is approximately half a thickness of said lead;

a semiconductor die electrically coupled with said inner pad of said lead; and

an encapsulant material encapsulating at least a portion of said lead frame, wherein a portion of said outer pad is exposed.

15. A method, comprising:

providing a matrix of lead frames, each of said lead frames comprising a lead;

forming a channel extending through a width of said lead to create an inner pad, an outer pad and a connection member in said lead;

electrically coupling a semiconductor die with said inner pad; and

encapsulating at least a portion of said lead frame such that at least a portion of said outer pad is exposed.

16. The method of claim 15, further comprising singulating said matrix to form a plurality of packages.

17. The method of claim 16, wherein said singulating comprises a saw singulation.

18. A method, comprising:

providing a lead frame comprising a lead;

forming a channel extending through a width of said lead to create an inner pad, an outer pad and a connection member in said lead;

electrically coupling a semiconductor die with said inner pad; and

encapsulating at least a portion of said lead frame such that at least a portion of said outer pad is exposed.

19. The method of claim 18, wherein said forming comprises etching said channel into said lead.

20. The method of claim 19, wherein said etching comprises a chemical etching process.

21. The method of claim 19, wherein said etching comprises etching said connection member to a thickness of approximately half a thickness of said lead.

22. The method of claim 18, further comprising attaching a solder member to said outer pad.

23. The method of claim 18, wherein said electrically coupling comprises attaching a wire between said semiconductor die and said inner pad by a thermo-sonic bonding process.

24. The method of claim 23, wherein said bonding process comprises attaching said wire to a top side of said inner pad while a support contacts a bottom side of said inner pad and a bottom side of said outer pad.

25. The method of claim 23, wherein said support is a substantially flat plate.