Surface emitting semiconductor laser and method of fabricating the same

• US 20030235226A1
• Filed: 02/28/2003
• Published: 12/25/2003
• Est. Priority Date: 06/20/2002
• Status: Abandoned Application

• Current Assignee: Fuji Xerox Company Limited (Xerox Holdings Corp.)
• Original Assignee: Fuji Xerox Company Limited (Xerox Holdings Corp.)
• Inventors: Ueki, Nobuaki
• Application Number:
  US10/375,133
• Publication Number:
  US 20030235226A1
• Time in Patent Office: Days
• US Class Current: 372/46.01
• CPC Class Codes: H01S 2301/166 Single transverse or lateral mode
• CPC Class Codes: H01S 5/0421 characterised by the semiconducting contacting layers electrodes H01S5/0425
• CPC Class Codes: H01S 5/18311 using selective oxidation
• CPC Class Codes: H01S 5/18358 containing spacer layers to adjust the phase of the light wave in the cavity
• CPC Class Codes: H01S 5/18394 Apertures, e.g. defined by the shape of the upper electrode
• CPC Class Codes: H01S 5/2086 lateral etch control, e.g. mask induced

Abstract

A surface emitting semiconductor laser includes a substrate, a lower semiconductor multilayer mirror of a first conduction type formed on the substrate, an upper semiconductor multilayer mirror of a second conduction type, an active region disposed between the lower and upper semiconductor multilayer mirrors, a current confinement portion arranged between the lower and upper semiconductor multilayer mirrors, and a metal layer provided on the upper semiconductor multilayer mirror. A mesa structure is formed so as to include at least the upper semiconductor multilayer mirror, the current confinement portion and the metal layer. The mesa structure has a side surface aligned with the metal layer.

Claims

1. A surface emitting semiconductor laser comprising:

a substrate;

a lower semiconductor multilayer mirror of a first conduction type formed on the substrate;

an upper semiconductor multilayer mirror of a second conduction type;

an active region disposed between the lower and upper semiconductor multilayer mirrors;

a current confinement portion arranged between the lower and upper semiconductor multilayer mirrors; and

a metal layer provided on the upper semiconductor multilayer mirror,

a mesa structure being formed so as to include at least the upper semiconductor multilayer mirror, the current confinement portion and the metal layer,

the mesa structure having a side surface aligned with the metal layer.

2. The surface emitting semiconductor laser as claimed in claim 1, wherein the side surface of the mesa structure is aligned with a surface that defines an outer shape of the metal layer.

3. The surface emitting semiconductor laser as claimed in claim 1, wherein the side surface of the mesa structure is formed by etching with the metal layer being used as a mask.

4. The surface emitting semiconductor laser as claimed in claim 1, wherein:

the metal layer has a window from which laser light is emitted; and

a reflectance of the upper semiconductor multilayer mirror covered by the metal layer is lower than that of the upper semiconductor multilayer mirror exposed via the window.

5. The surface emitting semiconductor laser as claimed in claim 1, wherein:

the metal layer is connected to a second metal contact layer; and

current supplied from the second metal contact layer is supplied to the upper semiconductor multilayer mirror via the metal layer.

6. The surface emitting semiconductor laser as claimed in claim 5, wherein:

the mesa structure includes an insulating layer provided on the side surface;

the second metal contact layer is provided on the insulating layer; and

the second metal contact layer is isolated from the side surface of the mesa structure by the insulating layer.

7. The surface emitting semiconductor laser according to claim 4, wherein:

the current confinement portion includes an oxidized region defined by selectively oxidizing the mesa structure from the side surface thereof, and a non-oxidized region surrounded by the oxidized region; and

an aperture defined by the non-oxidized region is substantially aligned with the window.

8. The surface emitting semiconductor laser according to claim 7, wherein the window in the metal layer is larger than an aperture defined by the non-oxidized region.

9. The surface emitting semiconductor laser according to claim 1, wherein the metal layer comprises a metal containing at least one of Au, Pt, Ti, Ge, Zn, Ni, In, W and ITO.

10. The surface emitting semiconductor laser according to claim 1, wherein the upper semiconductor multilayer mirror comprises a contact layer, and the metal layer is formed on the contact layer.

11. A surface emitting semiconductor laser comprising:

a substrate;

multiple semiconductor layers formed on the substrate, the multiple semiconductor layers including a first reflection mirror of a first conduction type, an active region on the first reflection mirror, at least one current confinement layer partially including an oxidized region, and a second reflection mirror of a second conduction type; and

an electrode having a light emitting window formed on the multiple semiconductor layers,

a mesa structure being formed so as to include at least the first reflection mirror, the at least one current confinement layer and the electrode and extending at least from the second reflection mirror to the current confinement layer,

the mesa structure having a shape that corresponds to a shape of the electrode.

12. The surface emitting semiconductor laser as claimed in claim 11, wherein:

the multiple semiconductor layers include a contact region having a comparatively high impurity concentration on the second reflection mirror; and

the electrode is electrically connected to the contact layer.

13. The surface emitting semiconductor laser as claimed in claim 12, wherein the electrode is connected to the contact layer with an ohmic contact.

14. The surface emitting semiconductor laser as claimed in claim 11, wherein the mesa structure is self-aligned by etching the multiple semiconductor layers with the electrode being used as a mask.

15. The surface emitting semiconductor laser as claimed in claim 11, wherein the mesa structure has a cylindrical post structure.

16. A method of fabricating a surface emitting semiconductor laser comprising the steps of:

forming multiple semiconductor layers on a substrate, the multiple semiconductor layers including first and second semiconductor mirrors, a current confinement layer and an active layer;

forming a metal layer on the multiple semiconductor layers;

forming the metal layer into a predetermined shape;

etching the multiple semiconductor layers with the metal layer being used as a mask so that a mesa structure extending at least from the second semiconductor mirror to the current confinement layer is formed; and

exposing the mesa structure to a water vapor atmosphere so as to form an oxidized region that is part of the current confinement layer.

17. The method as claimed in claim 16, wherein the multiple semiconductor layers include a contact layer on the second semiconductor mirror, and the metal layer is formed on the contact layer.

18. The method as claimed in claim 17, wherein the metal layer comprises a metal containing at least one of Au, Pt, Ti, Ge, Zn, Ni, In, W and ITO.

19. A method of fabricating a surface emitting semiconductor laser comprising the steps of:

forming multiple semiconductor layers on a substrate, the multiple semiconductor layers including first and second semiconductor mirrors, a current confinement layer and an active layer;

forming a metal layer on the multiple semiconductor layers;

forming an insulating layer on the metal layer;

patterning the insulating layer and the metal layer into a predetermined shape;

anisotropically etching the multiple semiconductor layers with a patterned insulating layer and a patterned metal layer so that a mesa structure extending at least from the second semiconductor mirror to the current confinement layer is formed; and

exposing the mesa structure to a water vapor atmosphere so as to form an oxidized region that is part of the current confinement layer.

20. The method as claimed in claim 19, further comprising the steps of:

removing the insulating layer from the metal layer; and

forming a second metal layer on the metal layer.

21. The method as claimed in claim 19, wherein:

the step of patterning patterns the metal layer and the insulating layer into a ring shape; and

the method further comprises a step of forming a second patterned insulating layer on a ring-shaped pattern, the second patterned insulating layer covering an upper surface of the multiple semiconductor layers exposed via the ring-shaped pattern.