Multiple-mode memory and method for forming same
First Claim
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1. A multiple-mode memory comprising:
- an integrated circuit substrate;
a plurality of word lines;
a plurality of bit lines crossing the word lines;
a plurality of memory cells, each memory cell coupled between a respective word line and a respective bit line, the word lines, bit lines and memory cells included in a single integrated circuit carried by the substrate;
the memory cells comprising a plurality of field-programmable write-once memory cells and a plurality of field-programmable re-writable memory cells.
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Abstract
A multiple-mode memory includes a three-dimensional array of word lines, bit lines and memory cells. The memory cells are arranged in multiple vertically stacked layers. In some layers the memory cells are implemented as field-programmable write-once memory cells, and in other layers the memory cells are implemented as field-programmable re-writable memory cells. In this way, both re-writability and permanent data storage are provided in an inexpensive, single-chip solution. Additional types and numbers of types of memory cells can be used.
36 Citations
29 Claims
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1. A multiple-mode memory comprising:
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an integrated circuit substrate;
a plurality of word lines;
a plurality of bit lines crossing the word lines;
a plurality of memory cells, each memory cell coupled between a respective word line and a respective bit line, the word lines, bit lines and memory cells included in a single integrated circuit carried by the substrate;
the memory cells comprising a plurality of field-programmable write-once memory cells and a plurality of field-programmable re-writable memory cells. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method for forming a multiple-mode memory, the method comprising:
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(a) providing an integrated circuit substrate;
(b) forming a set of first levels of field-programmable write-once memory cells carried by and overlying the substrate; and
(c) forming a set of second levels of field-programmable re-writable memory cells carried by and overlying the substrate;
the first and second levels of memory cells vertically stacked on the substrate in a three-dimensional memory array. - View Dependent Claims (12, 13, 14, 15, 16, 17)
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18. A multiple-mode memory comprising:
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an integrated circuit substrate;
a plurality of word lines;
a plurality of bit lines crossing the word lines;
a plurality of memory cells, each memory cell coupled between a respective word line and a respective bit line, the word lines, bit lines and memory cells included in a single integrated circuit carried by the substrate;
the memory cells comprising a plurality of memory cells of a first type and a plurality of memory cells of a second type. - View Dependent Claims (19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29)
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Specification