Postdistortion amplifier with predistorted postdistortion

• US 20040001559A1
• Filed: 06/28/2002
• Published: 01/01/2004
• Est. Priority Date: 06/28/2002
• Status: Active Grant

• Current Assignee: Google Technology Holdings LLC (Alphabet Inc.)
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: McBeath, Sean Michael, Pinckley, Danny Thomas
• Granted Patent: US 7,333,561 B2
• Time in Patent Office: Days
• US Class Current: 375/297
• CPC Class Codes: H03F 1/3223 using feed-forward H03F1/3211 takes precedence
• CPC Class Codes: H03F 1/3294 Acting on the real and imaginary components of the input signal
• CPC Class Codes: H03F 2201/3221 Predistortion by overamplifying in a feedforward stage the distortion signal to have a combined main signal and "negative" distortion to form the predistorted signal for a further stage. so that after amplification in the further stage only the amplified main signal remains

Abstract

A postdistortion amplifier that produces a postdistortion amplifier output signal based on a signal input to the postdistortion amplifier reduces distortion in the postdistortion amplifier output signal by digitally predistorting an error signal. The postdistortion amplifier includes a digital predistortion unit that receives a digital error signal and produces a digital predistorted error signal based on the received digital error signal and by reference to a predistorted error signal model.

Claims

1. An apparatus for predistorting an error signal in a postdistortion amplifier comprising:

a predistorted error signal model; and

a digital predistortion unit that receives a digital error signal and produces a digital predistorted error signal based on the received digital error signal and by reference to the predistorted error signal model.

2. The apparatus of claim 1, wherein the predistorted error signal model comprises a look-up table in which is stored a plurality of predistortion parameters.

3. The apparatus of claim 1, wherein the predistorted error signal model comprises an algorithm.

4. The apparatus of claim 1, wherein the predistorted error signal model generates at least one predistortion signal parameter based on at least one error signal parameter and wherein, in response to receiving an error signal, the digital predistortion unit determines at least one parameter of the received error signal, determines at least one predistortion signal parameter based on the determined at least one parameter of the received error signal and by reference to the predistorted error signal model, and combines the determined at least one parameter of the received error signal with the determined at least one predistortion signal parameter to produce the digital predistorted error signal.

5. The apparatus of claim 1, wherein the predistorted error signal model generates at least one predistortion signal parameter based on at least one error signal parameter and wherein, in response to receiving an error signal, the digital predistortion unit determines at least one parameter of the received error signal, determines at least one parameter of the predistorted error signal based on the determined at least one parameter of the received error signal and by reference to the predistorted error signal model, and produces a predistorted error signal based on the determined at least one parameter of the predistorted error signal.

6. The apparatus of claim 1, further comprising an error amplifier behavior estimation and correction unit operably coupled to the digital predistortion unit that characterizes a propagation path of the error signal and updates the predistorted error signal model based on the propagation path characterization.

7. The apparatus of claim 1, further comprising an error amplifier behavior estimation and correction unit operably coupled to the digital predistortion unit that characterizes a propagation path of the error signal and wherein the digital predistortion unit updates the predistorted error signal model based on the characterization of the propagation path by the error amplifier behavior estimation and correction unit.

8. The apparatus of claim 1, further comprising an auxiliary circuit coupled to the digital predistortion unit that feeds back a sample of an amplified version of the error signal, and wherein the digital predistortion unit updates the predistorted error signal model based on the sample of the amplified version of the error signal.

9. The apparatus of claim 1, further comprising an auxiliary circuit coupled to the digital predistortion unit and to a main signal path that feeds back at least one of a sample of an amplified version of an input signal coupled to the main signal path and a postdistortion amplifier output signal, and wherein the digital predistortion unit updates the predistorted error signal model based on the at least one fed back sample.

10. The apparatus of claim 1, wherein the postdistortion amplifier comprises a main signal path coupled to a postdistortion correction circuit, wherein the postdistortion correction circuit produces a digital error signal based on a digital input signal coupled to the postdistortion correction circuit and amplifies the error signal to produce an amplified error signal, and wherein the apparatus further comprises:

a second signal coupler that samples the amplified error signal to produce a sampled amplified error signal;

a demodulator operably coupled to the signal coupler that demodulates the sampled amplified error signal to produce a baseband amplified error signal;

an analog-to-digital converter (A/D) operably coupled to the demodulator that digitizes the baseband amplified error signal to produce a digital amplified error signal; and

an error amplifier behavior estimation and correction unit operably coupled to the A/D that receives at least a portion of the digital error signal, characterizes at least a portion of the postdistortion correction circuit based on the received at least a portion of the digital error signal and the digital amplified error signal, and provides for updating of the predistorted error signal model based on the characterization of the at least a portion of the postdistortion correction circuit.

11. The apparatus of claim 1, wherein the postdistortion amplifier comprises a main signal path that produces a main signal path output signal in response to a coupling of a digital input signal to the main signal path and wherein the apparatus further comprises:

a main amplifier behavior estimation unit that stores a characterization of the main signal path of the postdistortion amplifier and produces a digital estimate of the signal output by the main signal path in response to receiving at least a portion of the digital input signal; and

a summation junction operably coupled to each of the main amplifier behavior estimation unit and the digital predistortion unit, wherein the summation junction receives at least a portion of the digital input signal and combines the digital input signal and the digital estimate of a signal output by the main signal path to produce the error signal.

12. The apparatus of claim 11, further comprising an auxiliary circuit coupled to each of the main signal path and the main amplifier behavior estimation unit, wherein the auxiliary circuit feeds back to the main amplifier behavior estimation unit at least one of a sample of the main signal path output signal and a sample of a postdistortion amplifier output signal, and wherein the main amplifier behavior estimation unit updates the characterization of the main signal path of the postdistortion amplifier based on the at least one fed back sample.

13. The apparatus of claim 11, further comprising:

a signal coupler that samples the signal output by the main signal path to produce a sampled main signal path output signal;

a demodulator operably coupled to the signal coupler that demodulates the sampled main signal path output signal to produce a baseband main signal path output signal;

an analog-to-digital converter (A/D) operably coupled to the demodulator and the main amplifier behavior estimation unit that digitizes the baseband main signal path output signal to produce a digital main signal path output signal; and

wherein the main amplifier behavior estimation unit updates the characterization of the main signal path of the postdistortion amplifier based on the digital input signal and the digital main signal path output signal.

14. The apparatus of claim 11, further comprising:

a signal coupler that samples a signal output by the postdistortion amplifier to produce a sampled postdistortion amplifier output signal;

a demodulator operably coupled to the signal coupler that demodulates the sampled postdistortion amplifier output signal to produce a baseband postdistortion amplifier output signal;

an analog-to-digital converter (A/D) operably coupled to the demodulator and the main amplifier behavior estimation unit that digitizes the baseband postdistortion amplifier output signal to produce a digital postdistortion amplifier output signal; and

wherein the main amplifier behavior estimation unit updates the characterization of the main signal path of the postdistortion amplifier based on the digital input signal and the digital postdistortion amplifier output signal.

15. A method for predistorting an error signal in a postdistortion amplifier that receives a digital input signal and produces a linearized amplified signal based on the digital input signal, wherein the method comprises steps of:

maintaining a predistorted error signal model;

producing a digital error signal based on the digital input signal; and

producing a digital predistorted error signal based on the received digital error signal and by reference to the predistorted error signal model.

16. The method of claim 15, wherein the step of maintaining a predistorted error signal model comprises a step of maintaining at least one error signal parameter and a corresponding at least one predistortion signal parameter, and wherein the step of producing a digital predistorted error signal comprises steps of:

determining at least one parameter of the digital error signal;

determining at least one predistortion signal parameter based on the determined at least one parameter of the digital error signal and by reference to the stored at least one error signal parameter and corresponding at least one predistortion signal parameter; and

combining the determined at least one parameter of the received error signal and the determined at least one predistortion signal parameter to produce the digital predistorted error signal.

17. The method of claim 15, wherein the step of maintaining a predistorted error signal model comprises a step of storing at least one error signal parameter and corresponding at least one predistorted error signal parameter and wherein the step of producing a digital predistorted error signal comprises steps of:

determining at least one parameter of the digital error signal;

determining at least one parameter of the predistorted error signal based on the determined at least one parameter of the digital error signal and by reference to the stored at least one error signal parameter and corresponding at least one predistorted error signal parameter; and

producing a predistorted error signal based on the determined at least one parameter of the predistorted error signal.

18. The method of claim 15, further comprising steps of:

characterizing at least a portion of a propagation path of the error signal; and

updating the stored at least one error signal parameter and corresponding at least one predistorted error signal parameter based on the characterization of the at least a portion of the error signal propagation path.

19. The method of claim 18, wherein the step of characterizing at least a portion of a propagation path of the error signal comprises steps of:

amplifying the error signal to produce an amplified error signal;

sampling the amplified error signal to produce a sampled amplified error signal;

producing a digital amplified error signal based on the sampled amplified error signal; and

characterizing at least a portion of the postdistortion correction circuit based on the digital error signal and the digital amplified error signal.

20. The method of claim 19, further comprising a step of updating a predistorted error signal model based on the characterization of the at least a portion of the postdistortion correction circuit.

21. The method of claim 15, further comprising steps of:

amplifying the error signal to produce an amplified error signal;

sampling the amplified error signal to produce a sampled amplified error signal; and

updating the predistorted error signal model based on the sampled amplified error signal.

22. The method of claim 15, further comprising steps of:

sampling of an amplified version of an input signal coupled to a main signal path of the postdistortion amplifier to produce a sampled amplified input signal; and

updating the predistorted error signal model based on the sampled amplified input signal.

23. The method of claim 15, further comprising steps of:

sampling a postdistortion amplifier output signal to produce a sampled postdistortion amplifier output signal; and

updating the predistorted error signal model based on the sampled postdistortion amplifier output signal.

24. The method of claim 15, wherein the step of producing a digital error signal comprises steps of:

characterizing a main signal path of the postdistortion amplifier to produce a main signal path characterization;

receiving a digital input signal;

producing a digital estimate of a signal output by the main signal path based on the received digital input signal and the main signal path characterization; and

combining the digital input signal and the digital estimate of a signal output by the main signal path to produce the digital error signal.

25. The method of claim 24, further comprising steps of:

sampling a signal output by a main signal path of the postdistortion amplifier to produce a sampled main signal path output signal; and

updating the main signal path characterization based on the sampled main signal path output signal.

26. The method of claim 24, wherein the step of characterizing a main signal path of the postdistortion amplifier to produce a main signal path characterization further comprising steps of:

sampling a signal output by a main signal path of the postdistortion amplifier to produce a sampled main signal path output signal;

demodulating the sampled main signal path output signal to produce a baseband main signal path output signal;

digitizing the baseband main signal path output signal to produce a digital main signal path output signal; and

updating the main signal path characterization based on the digital input signal and the digital main signal path output signal.

27. The method of claim 24, wherein the step of characterizing a main signal path of the postdistortion amplifier to produce a main signal path characterization further comprising steps of:

sampling a signal output by the postdistortion amplifier to produce a sampled postdistortion amplifier output signal;

demodulating the sampled postdistortion amplifier output signal to produce a baseband postdistortion amplifier output signal;

digitizing the baseband postdistortion amplifier output signal to produce a digital postdistortion amplifier output signal; and

updating the main signal path characterization based on the digital input signal and the digital postdistortion amplifier signal.

28. A postdistortion amplifier comprising:

a main signal path that receives a digital input signal and produces an amplified signal in response to receiving the digital input signal;

a postdistortion correction circuit that is coupled to the main signal path, wherein the postdistortion correction circuit receives at least a portion of the digital input signal, maintains a characterization of the main signal path, produces a digital error signal based on the at least a portion of the digital input signal and the characterization of the main signal path, predistorts the digital error signal based on a predistorted error signal model to produce a digital predistorted error signal, and produces an amplified error signal based on the predistorted error signal, wherein the predistortion of the error signal at least partially cancels distortion introduced by the postdistortion correction circuit to the amplified error signal; and

a signal combiner coupled to the main signal path and to the postdistortion correction circuit that receives the amplified signal from the main signal path, receives the amplified error signal from the postdistortion correction circuit, and combines the amplified signal with the amplified error signal to produce a postdistortion amplifier output signal.

29. The postdistortion amplifier of claim 28, wherein the postdistortion correction circuit comprises:

a predistorted error signal model; and

a digital predistortion unit that produces the digital predistorted error signal based on the digital error signal and by reference to the predistorted error signal model.

30. The postdistortion amplifier of claim 29, wherein the predistorted error signal model comprises a look-up table in which is stored at least one predistortion parameter.

31. The postdistortion amplifier of claim 29, wherein the predistorted error signal model comprises an algorithm.

32. The postdistortion amplifier of claim 28, wherein the postdistortion correction circuit further comprises:

a main amplifier behavior estimation unit that receives at least a portion of the digital input signal, maintains a characterization of the main signal path of the postdistortion amplifier, and produces a digital estimate of the signal output by the main signal path in response to a coupling of the digital input signal to the main amplifier behavior estimation unit, and

a summation junction operably coupled to each of the main amplifier behavior estimation unit and the digital predistortion unit, wherein the summation junction receives at least a portion of digital input signal and combines the digital input signal and the digital estimate of a signal output by the main signal path to produce the error signal.

33. The postdistortion amplifier of claim 28, further comprising an auxiliary circuit coupled to each of the main signal path and the postdistortion correction circuit, wherein the auxiliary circuit receives at least a portion of the signal output by the main signal path and produces a digital version of the signal output by the main signal path based on the received at least a portion of the signal output by the main signal path, and wherein the postdistortion amplifier updates the characterization of the main signal path based on the digital input signal and the digital version of the signal output by the main signal path.

34. The postdistortion amplifier of claim 28, further comprising an auxiliary circuit coupled to each of the main signal path, the postdistortion correction circuit, and the signal combiner, wherein the auxiliary circuit receives at least a portion of the postdistortion amplifier output signal and produces a digital version of the postdistortion amplifier output signal based on the received at least a portion of the postdistortion amplifier output signal, and wherein the postdistortion amplifier updates the characterization of the main signal path based on the digital input signal and the digital version of the postdistortion amplifier output signal.

35. The postdistortion amplifier of claim 28, further comprising an auxiliary circuit coupled to the postdistortion correction circuit, wherein the auxiliary circuit receives at least a portion of the digital input signal and at least a portion of the amplified error signal and wherein the postdistortion amplifier updates the predistorted error signal model based on the at least a portion of the digital input signal and at least a portion of the amplified error signal.

36. The postdistortion amplifier of claim 28, further comprising an auxiliary circuit coupled to the postdistortion correction circuit, wherein the auxiliary circuit receives at least a portion of the digital input signal and at least a portion of the amplified error signal and produces a digital amplified error signal based on the at least a portion of the amplified error signal, characterizes at least a portion of the postdistortion correction circuit based on the received at least a portion of the digital error signal and the digital amplified error signal, and wherein the postdistortion amplifier updates the predistorted error signal model based on the characterization of the at least a portion of the postdistortion correction circuit.

37. The postdistortion amplifier of claim 28, further comprising an auxiliary circuit coupled to the digital predistortion unit and to a main signal path that feeds back at least one of a sample of an amplified version of an input signal coupled to the main signal path and a sample of a postdistortion amplifier output signal, and wherein the digital predistortion unit updates the predistorted error signal model based on the at least one fed back sample.

38. A wireless communication device comprising:

an information source that sources information to a processor;

a processor that receives the information from the information source, produces a digital input signal based on the received information, and couples the digital input signal to a postdistortion amplifier;

a postdistortion amplifier that receives the digital input signal from the processor and produces a linearized amplified signal based on the digital input signal, the postdistortion amplifier comprising;

a main signal path that receives the digital input signal and produces an amplified signal in response to receiving the digital input signal;

a postdistortion correction circuit that is coupled to the main signal path, wherein the postdistortion correction circuit receives at least a portion of the digital input signal, maintains a characterization of the main signal path, maintains a predistorted error signal model, produces a digital error signal based on the at least a portion of the digital input signal and the characterization of the main signal path, predistorts the digital error signal based on the predistorted error signal model to produce a digital predistorted error signal, and produces an amplified error signal based on the predistorted error signal, wherein the predistortion of the error signal at least partially cancels distortion introduced by the postdistortion correction circuit to the amplified error signal; and

a signal combiner coupled to the main signal path and to the postdistortion correction circuit that receives the amplified signal from the main signal path, receives the amplified error signal from the postdistortion correction circuit, and combines the amplified signal with the amplified error signal to produce a linearized amplified signal.

39. The wireless communication device of claim 38, further comprising an auxiliary circuit coupled to each of the main signal path and the postdistortion correction circuit, wherein the auxiliary circuit receives at least a portion of the signal output by the main signal path and produces a digital version of the signal output by the main signal path based on the received at least a portion of the signal output by the main signal path, and wherein the postdistortion amplifier updates the characterization of the main signal path based on the digital input signal and the digital main signal path output signal.

40. The wireless communication device of claim 38, further comprising an auxiliary circuit coupled to each of the main signal path, the postdistortion correction circuit, and the signal combiner, wherein the auxiliary circuit receives at least a portion of the linearized amplified signal and produces a digital version of the linearized amplified signal based on the received at least a portion of the linearized amplified signal, and wherein the postdistortion amplifier updates the characterization of the main signal path based on the digital input signal and the digital linearized amplified signal.

41. The wireless communication device of claim 38, further comprising an auxiliary circuit coupled to the postdistortion correction circuit, wherein the auxiliary circuit receives at least a portion of the digital input signal and at least a portion of the amplified error signal, and wherein the postdistortion amplifier updates the predistorted error signal model based on the at least a portion of the digital input signal and at least a portion of the amplified error signal.