Method and apparatus for in-band signaling of runtime general purpose events

• US 20040003159A1
• Filed: 06/28/2002
• Published: 01/01/2004
• Est. Priority Date: 06/28/2002
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Kumar, Mohan J., Sethi, Prashant, Muthrasanallur, Sridhar
• Granted Patent: US 7,065,597 B2
• Time in Patent Office: Days
• US Class Current: 710/302
• CPC Class Codes: G06F 13/4027 using bus bridges G06F13/4022 takes precedence

Abstract

A method and apparatus for communicating general purpose events in-band from a downstream controller is presented.

Claims

1. A method of communicating a runtime general purpose event from a downstream controller without the use of a sideband signal, the method comprising:

receiving a data packet from the downstream controller;

comparing at least a portion of the received packet with one or more codes denoting an associated one or more general purpose events; and

communicating an identified general purpose event to an operating system if there is a match.

2. The method of claim 1 wherein the general purpose event is a hot plug interrupt.

3. The method of claim 1 wherein receiving a data packet comprises receiving a Peripheral Component Interconnect (PCI) Express data packet.

4. The method of claim 1 wherein communicating the general purpose event to an operating system if there is a match comprises asserting a signal.

5. The method of claim 1 wherein communicating the general purpose event to an operating system if there is a match comprises generating an ACPI interrupt.

6. The method of claim 1 wherein the downstream controller is a bridge.

7. The method of claim 3 wherein the PCI Express data packet comprises a vendor specific message.

8. A method of communicating a runtime general purpose event from a downstream controller along a PCI Express bus, the method comprising:

receiving a PCI Express message;

comparing at least a portion of the message with one or more codes denoting an associated one or more general purpose events; and

communicating an identified general purpose event to an operating system if there is a match.

9. The method of claim 8 wherein receiving a PCI Express message comprises receiving a vendor specific message.

10. The method of claim 8 wherein communicating the general purpose event to an operating system if there is a match comprises generating an ACPI interrupt.

11. A computing device comprising:

means for implementing a PCI Express bus;

means for detecting a hot plug event; and

means for communicating the hot plug event in-band through the PCI Express bus.

12. The computing device of claim 11 further comprising means for communicating the hot plug event to an operating system.

13. The computing device of claim 11 wherein the means for communicating the hot plug event in-band through the PCI Express bus comprises:

means for generating a vendor specific message; and

means for transmitting the vendor specific message along a PCI Express connection.

14. The computing device of claim 12 wherein the means for communicating the hot plug event to an operating system comprises:

means for receiving a PCI Express message;

means for comparing at least a portion of the message with one or more codes denoting an associated one or more hot plug events; and

means for generating an ACPI interrupt if there is a match.

15. The computing device of claim 12 wherein the means for communicating the hot plug event to an operating system comprises:

means for receiving a PCI Express message;

means for comparing at least a portion of the message with one or more codes denoting an associated one or more hot plug events; and

means for asserting a signal if there is a match.

16. An apparatus comprising:

a bridge capable of sending a vendor specific message in response to a hot plug event; and

a host controller responsive to the vendor specific message to communicate the hot plug event to an operating system.

17. The apparatus of claim 16 wherein the bridge communicates with the host controller through a PCI Express connection.

18. The apparatus of claim 17 wherein the host controller communicates the hot plug event to the operating system by generating an ACPI interrupt.

19. The apparatus of claim 17 wherein the host controller communicates the hot plug event to the operating system by asserting a signal.

20. A method of communicating a runtime general purpose event from a downstream controller along a PCI Express bus, the method comprising:

performing a memory write that denotes a general purpose event;

identifying the general purpose event from the memory write; and

communicating the identified general purpose event to an operating system.

21. The method of claim 20 wherein performing a memory write that denotes a general purpose event comprises transmitting a 32 bit write request.

22. The method of claim 20 wherein communicating the general purpose event to an operating system comprises generating an ACPI interrupt.