Method, system, and computer program product to generate test instruction streams while guaranteeing loop termination

• US 20040003210A1
• Filed: 06/27/2002
• Published: 01/01/2004
• Est. Priority Date: 06/27/2002
• Status: Abandoned Application

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Wittig, Dennis W., Duale, Ali Y., Bohizic, Theodore J.
• Application Number:
  US10/183,865
• Publication Number:
  US 20040003210A1
• Time in Patent Office: Days
• US Class Current: 712/227
• CPC Class Codes: G06F 11/263 Generation of test inputs, e.g. test vectors, patterns or sequences ; with adaptation of the tested hardware for testability with external testers

Abstract

A method, system, and computer program product for generating terminating, pseudo-random test instruction streams, including forward and backward branching instructions. A first instruction stream is generated, including at least one backward branching instruction and at least one forward branching instruction. Each backward branching instruction is preceded by at least one forward branching instruction, which is used to guarantee termination of the loop formed by the backward branching instruction. Backward branching targets are resolved when the backward branching instruction is inserted into the first instruction stream. Forward branching targets remain unresolved in the first instruction stream. A set of potential branch targets is determined for each forward branching instruction. For each forward branching instruction, a branch target is randomly selected from the set of potential branch targets for that forward branching instruction. The final terminating instruction stream consists of the first stream, with all forward branch targets resolved.

Claims

1. A method of generating a terminating instruction stream including at least one backward branching instruction, said method comprising:

generating a first instruction stream, said first instruction stream including at least one backward branching instruction and a plurality of loop components, each of said at least one backward branching instructions being preceded by one or more of said loop components, said loop components including;

one or more branch initialization instructions; and

one or more forward branching instructions;

determining a set of target addresses for each of said one or more forward branching instructions;

producing the terminating instruction stream from the first instruction stream, by selecting a target address from said set of target addresses for each of said one or more forward branching instructions.

2. The method of claim 1, wherein the terminating instruction stream includes a plurality of branch paths to at least one instruction set.

3. The method of claim 1, wherein the at least one backward branching instruction includes at least one instruction normally associated with uncontrolled loops.

4. The method of claim 3, wherein the at least one instruction normally associated with uncontrolled loops is selected from the group consisting of branch on condition, branch on index high, and branch on index low.

5. The method of claim 1, wherein a branch initialization instruction precedes one or more of said one or more forward branching instructions.

6. The method of claim 1, further comprising storing location information for each of said backward branching instructions, forward branching instructions, and branch initialization instructions.

7. The method of claim 6, wherein said storing is performed substantially concurrently with said generating.

8. The method of claim 6, wherein said storing comprises mapping loop initialization, loop control, and branching properties of an instruction into a data word corresponding to said instruction.

9. The method of claim 1, wherein said terminating stream includes at least one random forward branching instruction, said random forward branching instruction inserted for a purpose other than loop control.

10. The method of claim 1, wherein said generating further comprises inserting randomly selected instructions between loop control instructions.

11. The method of claim 10, wherein said inserting comprises instruction stacking.

12. The method of claim 11, wherein at least one backward branch instruction is directly associated with a branch initialization instruction, without an intervening forward branching instruction.

13. The method of claim 10, wherein said inserting comprises preventing randomly selected backward branch instructions from being inserted into the first stream, unless a corresponding forward branching instruction is in the first instruction stream.

14. The method of claim 1, wherein the terminating stream includes nested loops.

15. The method of claim 1, wherein said determining comprises identifying loop zones and target zones within said first instruction stream.

16. At least one program storage device readable by a machine, tangibly embodying at least one program of instructions executable by the machine to perform a method of generating a terminating instruction stream including at least one backward branching instruction, said method comprising:

generating a first instruction stream, said first instruction stream including at least one backward branching instruction and a plurality of loop components, each of said at least one backward branching instructions being preceded by one or more of said loop components, said loop components including;

one or more branch initialization instructions; and

one or more forward branching instructions;

determining a set of target addresses for each of said one or more forward branching instructions;

producing the terminating instruction stream from the first instruction stream, by selecting a target address from said set of target addresses for each of said one or more forward branching instructions.

17. The at least one program storage device of claim 16, wherein the terminating instruction stream includes a plurality of branch paths to at least one instruction set.

18. The at least one program storage device of claim 16, wherein the at least one backward branching instruction includes at least one instruction normally associated with uncontrolled loops.

19. The at least one program storage device of claim 16, wherein a branch initialization instruction precedes one or more of said one or more forward branching instructions.

20. A data processing system for generating a terminating instruction stream including at least one backward branching instruction, said data processing system including a memory, said memory containing program code for performing the steps of:

generating a first instruction stream, said first instruction stream including at least one backward branching instruction and a plurality of loop components, each of said at least one backward branching instructions being preceded by one or more of said loop components, said loop components including;

one or more branch initialization instructions; and

one or more forward branching instructions;

determining a set of target addresses for each of said one or more forward branching instructions;

producing the terminating instruction stream from the first instruction stream, by selecting a target address from said set of target addresses for each of said one or more forward branching instructions.