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SCAN TEST METHOD FOR PROVIDING REAL TIME IDENTIFICATION OF FAILING TEST PATTERNS AND TEST BIST CONTROLLER FOR USE THEREWITH

  • US 20040003329A1
  • Filed: 06/27/2002
  • Published: 01/01/2004
  • Est. Priority Date: 06/27/2002
  • Status: Active Grant
First Claim
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1. A method of scan testing an integrated circuit to provide real time identification of a block of test patterns having at least one failing test pattern, comprising:

  • performing a number of test operations and storing a test response signature corresponding to each block of test patterns into a signature register;

    replacing the test response signature in said signature register with a test block expected signature;

    identifying said block as a failing test block when said test response signature is different from said test block expected signature; and

    repeating the preceding steps until the test is complete.

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