Methods and apparatus for verifying circuit board design

• US 20040003358A1
• Filed: 06/11/2003
• Published: 01/01/2004
• Est. Priority Date: 06/28/2002
• Status: Active Grant

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Araki, Kenji, Yokoyama, Ayao
• Granted Patent: US 7,043,704 B2
• Time in Patent Office: Days
• US Class Current: 716/5
• CPC Class Codes: G06F 30/367 Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods

Abstract

The present invention provides a method for verifying a design of a circuit board that has a wiring layer connecting components to be mounted, a power layer, and an insulating layer formed between the wiring layer and the power layer. According to this method, detection of chippings in the power layer is performed. The chipping is, for example, a gap, a slot, or a slit, and corresponds to one wiring layer and interrupts a region in which the wiring layer and the power layer are opposed to each other. When chippings are detected, a common-mode voltage expected to be caused owing to each of the chippings is computed. Subsequently, the position of the chipping and the value of the common-mode voltage caused owing to the chipping are outputted. Thus, the priorities of the chippings, to which countermeasure for suppressing radiation of electromagnetic waves should be applied, can easily be decided.

Claims

1. A method for verifying a design of a circuit board having a wiring layer connecting components to be mounted, a power layer, and an insulating layer formed between said wiring layer and said power layer, comprising the steps of:

detecting in an opposing region in which said wiring layer and said power layer are opposed to each other, a chipping of said power layer, which corresponds to one wiring layer and interrupts said opposing region;

computing a common-mode voltage to be expected to be caused at the chipping; and

outputting a position of the chipping and a value of the common-mode voltage caused owing to the chipping.

2. The method for verifying a design of a circuit board, according to claim 1, wherein said step of detecting a chipping includes the step of detecting a kind of the chipping according to dimensions of the chipping, which respectively correspond to both sides of a direction of width of said wiring layer serving as a signal line, from a gap, a slot, and a slit.

3. The method for verifying a design of a circuit board, according to claim 2, wherein in said step of computing the common-mode voltage, one of a plurality of computational expressions associated with the kinds of chippings and the dimensions is selected, and subsequently, an approximate value of the common-mode voltage is computed according to the selected computational expression.

4. The method for verifying a design of a circuit board, according to claim 1, which further comprises the step of making comparison between the common-mode voltage and a predetermined threshold and determining a signal line portion, which needs a countermeasure to suppress radiation of electromagnetic waves, in said wiring layer according to a result of the comparison.

5. The method for verifying a design of a circuit board, according to claim 4, which further comprises the step of computing a propagation value of the common-mode voltage, which is expected at the connector when the common-mode voltage exceeding the threshold propagates and reaches to the connector in a case where there is possibility of an occurrence of the common-mode voltage exceeding the threshold and that there is a portion, at which a cable-connection connector is to be mounted, on said circuit board.

6. The method for verifying a design of a circuit board, according to claim 5, which further comprises the step of making comparison between the computed propagation value and the threshold and outputting, according to a result of the comparison, a position of a mounting prearranged portion on which the connector is mounted, and at which there is possibility of an appearance of the propagation value exceeding the threshold, and also outputting the propagation value to be expected to appear at the mounting prearranged portion.

7. A method for verifying a design of a circuit board having a wiring layer connecting components to be mounted, a power layer, an insulating layer formed between said wiring layer and said power layer, and mounting prearranged parts, on which cable-connection connectors are mounted, comprising the steps of:

detecting in an opposing region in which said wiring layer and said power layer are opposed to each other, a chipping of said power layer, which corresponds to one wiring layer and interrupts said opposing region;

computing, in a case that the chipping is detected, a propagation value of a common-mode voltage expected at the connector when the common-mode voltage generated at the chipping propagates and reaches the connector; and

outputting, according to the computed propagation value, information representing whether or not a countermeasure for suppressing radiation of electromagnetic waves is applied to the connector or a cable connected to the connector.

8. The method for verifying a design of a circuit board, according to claim 7, wherein said step of detecting a chipping includes the step of detecting a kind of the chipping according to dimensions of the chipping, which respectively correspond to both sides of a direction of width of said wiring layer serving as a signal line, from a gap, a slot, and a slit.

9. An apparatus for verifying a design of a circuit board having a wiring layer connecting components to be mounted, a power layer, and an insulating layer formed between said wiring layer and said power layer, comprising:

a detecting portion for detecting in an opposing region in which said wiring layer and said power layer are opposed to each other, a chipping of said power layer, which corresponds to one wiring layer and interrupts said opposing region;

a computing portion for computing a common-mode voltage to be expected to be caused at the chipping; and

an output portion for outputting a position of the chipping and a value of the common-mode voltage caused owing to the chipping.

10. The apparatus for verifying a design of a circuit board, according to claim 9, wherein said detecting portion detects a kind of the chipping according to dimensions of the chipping, which respectively correspond to both sides of a direction of width of said wiring layer serving as a signal line, from a gap, a slot, and a slit.

11. The apparatus for verifying a design of a circuit board, according to claim 9, which further comprises a comparison/decision portion for making comparison between the common-mode voltage and a predetermined threshold value and for determining a signal line portion, which needs a countermeasure to suppress radiation of electronic waves, according to a result of the comparison,

wherein said computing portion computes a propagation value of the common-mode voltage, which is expected at the connector when the common-mode voltage exceeding the threshold propagates and reaches to the connector in a case where there is possibility of an occurrence of the common-mode voltage exceeding the threshold and that there is a portion, at which a cable-connection connector is to be mounted, on said circuit board.

12. The apparatus for verifying a design of a circuit board, according to claim 11, wherein said comparison/decision portion further makes comparison between the computed propagation value and the predetermined threshold and determines the mounting prearranged portion of the connector, which has possibility that the propagation value exceeding the threshold occurs there, according to a result of the comparison, and wherein said output portion outputs a position of said determined mounting prearranged portion and the propagation value associated with said mounting prearranged portion.

13. An apparatus for verifying a design of a circuit board having a wiring layer connecting components to be mounted, a power layer, an insulating layer formed between said wiring layer and said power layer, and mounting prearranged parts, on which cable-connection connectors are mounted, comprising:

a detecting portion for detecting in an opposing region in which said wiring layer and said power layer are opposed to each other, a chipping of said power layer, which corresponds to one wiring layer and interrupts said opposing region;

a computing portion for computing, in a case where the chipping is detected, a propagation value of a common-mode voltage expected at the connector when the common-mode voltage generated at the chipping propagates and reaches the connector; and

an output portion for outputting, according to the computed propagation value, information representing whether or not a countermeasure for suppressing radiation of electromagnetic waves is applied to the connector or a cable connected to the connector.

14. The apparatus for verifying a design of a circuit board according to claim 13, wherein said detecting portion detects a kind of the chipping according to dimensions of the chipping, which respectively correspond to both sides of a direction of width of said wiring layer serving as a signal line, from a gap, a slot, and a slit.

15. The apparatus for verifying a design of a circuit board according to claim 13, which further comprises a comparison/decision portion for making comparison between the computed propagation value and a predetermined threshold and for determining the mounting prearranged portion, which has possibility of an appearance of the propagation value exceeding the threshold and which needs the countermeasure, according to a result of the comparison, wherein said output portion outputs a position of said determined mounting prearranged portion and the propagation value associated with said mounting prearranged portion.