Method of and apparatus for forming three-dimensional structures integral with semiconductor based circuitry

• US 20040004001A1
• Filed: 05/07/2003
• Published: 01/08/2004
• Est. Priority Date: 05/07/2002
• Status: Abandoned Application

• Current Assignee: Microfabrica Incorporated (Technoprobe S.P.A.)
• Original Assignee: Memgen Corporation (Technoprobe S.P.A.)
• Inventors: Zhang, Gang, Cohen, Adam L.
• Application Number:
  US10/434,295
• Publication Number:
  US 20040004001A1
• Time in Patent Office: Days
• US Class Current: 205/118
• CPC Class Codes: B81B 2201/042 Micromirrors, not used as optical switches
• CPC Class Codes: B81C 1/00126 Static structures not provided for in groups B81C1/00031 - B81C1/00119
• CPC Class Codes: B81C 1/00246 Monolithic integration, i.e. micromechanical structure and electronic processing unit are integrated on the same substrate
• CPC Class Codes: B81C 2203/0735 Post-CMOS, i.e. forming the micromechanical structure after the CMOS circuit
• CPC Class Codes: C23C 18/1605 by masking
• CPC Class Codes: C23C 18/1651 Two or more layers only obtained by electroless plating
• CPC Class Codes: C23C 28/00 Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D
• CPC Class Codes: C23C 28/048 with layers graded in composition or physical properties
• CPC Class Codes: C23C 28/322 only coatings of metal elements only
• CPC Class Codes: C23C 28/34 including at least one inorganic non-metallic material layer, e.g. metal carbide, nitride, boride, silicide layer and their mixtures, enamels, phosphates and sulphates
• CPC Class Codes: C23C 28/345 with at least one oxide layer
• CPC Class Codes: C23C 28/36 including layers graded in composition or physical properties
• CPC Class Codes: C23C 4/01 Selective coating, e.g. pattern coating, without pre-treatment of the material to be coated
• CPC Class Codes: C25D 1/003 3D structures, e.g. superposed patterned layers
• CPC Class Codes: C25D 5/022 using masking means
• CPC Class Codes: C25D 7/123 Semiconductors first coated with a seed layer or a conductive layer
• CPC Class Codes: G01P 15/0802 Details
• CPC Class Codes: G01P 15/125 by capacitive pick-up
• CPC Class Codes: H01P 1/202 Coaxial filters cascaded coaxial cavities H01P1/205
• CPC Class Codes: H01P 11/00 Apparatus or processes specially adapted for manufacturing waveguides or resonators, lines, or other devices of the waveguide type
• CPC Class Codes: H01P 11/005 : Manufacturing coaxial lines
• CPC Class Codes: H01P 3/06 : Coaxial lines
• CPC Class Codes: H01P 5/183 : at least one of the guides being a coaxial line
• CPC Class Codes: H05K 3/4647 : by applying an insulating layer around previously made via studs

Abstract

Enhanced Electrochemical fabrication processes are provided that can form three-dimensional multi-layer structures using semiconductor based circuitry as a substrate. Electrically functional portions of the structure are formed from structural material (e.g. nickel) that adheres to contact pads of the circuit. Aluminum contact pads and silicon structures are protected from copper diffusion damage by application of appropriate barrier layers. In some embodiments, nickel is applied to the aluminum contact pads via solder bump formation techniques using electroless nickel plating. In other embodiments, selective electroless copper plating or direct metallization is used to plate sacrificial material directly onto dielectric passivation layers. In still other embodiments, structural material deposition locations are shielded, then sacrificial material is deposited, the shielding is removed, and then structural material is deposited. In still other embodiments structural material is made to attached to non-contact pad regions.

Claims

1. An electrochemical fabrication process for producing a three-dimensional structure from a plurality of adhered layers, the process comprising:

(A) selectively depositing at least a portion of a layer onto the substrate, wherein the substrate may comprise previously deposited material;

(B) forming a plurality of layers such that successive layers are formed adjacent to and adhered to previously deposited layers, wherein said forming comprises repeating operation (A) a plurality of times;

wherein at least a plurality of the selective depositing operations comprise;

(1) locating a mask on or in proximity to a substrate;

(2) in presence of a plating solution, conducting an electric current between an anode and the substrate through the at least one opening in the mask, such that a selected deposition material is deposited onto the substrate to form at least a portion of a layer; and

(3) separating the selected preformed mask from the substrate;

wherein the substrate comprises a semiconductor wafer or single die containing electrical circuitry and having contact pads to which structural material is to connect; and

wherein the process of contacting the contact pads with structural material comprises treating the wafer or die with a transition treatment and then applying a structural material to the contact pads by application of an electroless plating solution to the contact pads for a sufficient time to form a deposition of desired thickness.

2. The process of claim 1, wherein a plurality of layers comprise at least one structural material and at least one sacrificial material.

3. The process of claim 1 additionally comprising:

(A) supplying a plurality of preformed masks, wherein each mask comprises a patterned dielectric material that includes at least one opening through which deposition can take place during the formation of at least a portion of a layer, and

wherein each mask comprises a support structure that supports the patterned dielectric material; and

wherein the locating of a mask on or in proximity to a substrate comprises contacting the substrate and the dielectric material of a selected preformed mask.

4. The process of claim 1 wherein the locating of a mask on or in proximity to a substrate comprises forming and adhering a patterned mask to the substrate.

5. The process of claim 1 wherein after application of structural material to the contact pads, a layer of sacrificial material is applied to the surface of the wafer or die.

6. The process of claim 1 wherein the applied layer of sacrificial material has a thickness less than a desired thickness and is increased to a desired thickness by electroplating.

7. The process of claim 5 wherein after application of the sacrificial material, the deposited sacrificial and structural materials are planarized to yield a substrate comprising selective regions of sacrificial and structural material deposition on to which additional layers of a structural material and a sacrificial material will be deposited.

8. The process of claim 1 wherein the process further comprises applying a transition treatment to the contact pads.

9. The process of claim 8 wherein transition treatment comprises application of an adhesion promoter.

10. The process of claim 8 wherein transition treatment comprises application of a diffusion barrier.

11. The process of claim 1 wherein the structural material comprises nickel.

12. The process of claim 1 wherein the sacrificial material comprise copper.

13. An electrochemical fabrication process for producing a three-dimensional structure from a plurality of adhered layers, the process comprising:

(A) selectively depositing at least a portion of a layer onto the substrate, wherein the substrate may comprise previously deposited material;

(B) forming a plurality of layers such that successive layers are formed adjacent to and adhered to previously deposited layers, wherein said forming comprises repeating operation (A) a plurality of times;

wherein at least a plurality of the selective depositing operations comprise;

(1) locating a mask on or in proximity to a substrate;

(2) in presence of a plating solution, conducting an electric current between an anode and the substrate through the at least one opening in the mask, such that a selected deposition material is deposited onto the substrate to form at least a portion of a layer; and

(3) separating the selected preformed mask from the substrate;

wherein the substrate comprises a semiconductor wafer or single die containing electrical circuitry and having contact pads to which structural material is to connect; and

wherein the process of forming a conductive layer over a surface of the wafer or die comprises;

(a) shielding at least the contact pads with a shielding material;

(b) depositing a sacrificial material to unshielded regions using at least one of direct metallization or direct plating or electroless deposition;

(c) removing the shielding after a deposition of the sacrificial material; and

(d) depositing a structural material to the contact pads.

14. The process of claim 13, wherein a plurality of layers comprise at least one structural material and at least one sacrificial material.

15. The process of claim 13 additionally comprising:

(A) supplying a plurality of preformed masks, wherein each mask comprises a patterned dielectric material that includes at least one opening through which deposition can take place during the formation of at least a portion of a layer, and wherein each mask comprises a support structure that supports the patterned dielectric material; and

wherein the locating of a mask on or in proximity to a substrate comprises contacting the substrate and the dielectric material of a selected preformed mask.

16. The process of claim 13 wherein the locating of a mask on or in proximity to a substrate comprises forming and adhering a patterned mask to the substrate.

17. The process of claim 13 wherein after deposition of the sacrificial material and removal of the shielding, applying a treatment to the contact pads prior to depositing the structural material.

18. The process of claim 17 wherein the treatment comprises a treatment that enhances adhesion between the structural material and the contact pad.

19. The process of claim 13 wherein the deposition of the structural material comprises electroplating the structural material onto at least one contact pads via deposition of structural material onto the sacrificial material wherein the region of deposition of the structural material expands to bridge a dielectric gap separating the sacrificial material from the at least one contact pad.

20. The process of claim 18 wherein after deposition of the structural material, the deposited sacrificial and structural materials are planarized to yield a substrate comprising selective regions of sacrificial and structural material deposition on to which one or more layers comprising a structural material and a sacrificial material will be deposited.

21. The process of claim 13 wherein the process further comprises applying a transition treatment to the contact pads.

22. The process of claim 21 wherein transition treatment comprises application of an adhesion promoter.

23. The process of claim 21 wherein transition treatment comprises application of a diffusion barrier.

24. The process of claim 13 wherein the structural material comprises nickel.

25. The process of claim 13 wherein the sacrificial material comprise copper.

26. An electrochemical fabrication process for producing a three-dimensional structure from a plurality of adhered layers, the process comprising:

(A) selectively depositing at least a portion of a layer onto the substrate, wherein the substrate may comprise previously deposited material;

(B) forming a plurality of layers such that successive layers are formed adjacent to and adhered to previously deposited layers, wherein said forming comprises repeating operation (A) a plurality of times;

wherein at least a plurality of the selective depositing operations comprise;

(1) locating a mask on or in proximity to a substrate;

(2) in presence of a plating solution, conducting an electric current between an anode and the substrate through the at least one opening in the mask, such that a selected deposition material is deposited onto the substrate to form at least a portion of a layer; and

(3) separating the selected preformed mask from the substrate;

wherein the substrate comprises a semiconductor wafer or single die containing electrical circuitry and having contact pads to which structural material is to connect and having regions of dielectric where structural material is to adhere; and

wherein the process of contacting the structural material to regions of dielectric material comprises depositing a conductive base material, in a patterned or unpatterned formation, depositing structural material to at least selected locations of the base material and, if base material exists in any regions which are not overlaid by structural material, subsequently removing any such base material that is not overlaid.