Non-lot based method for assembling integrated circuit devices

• US 20040005090A1
• Filed: 07/07/2003
• Published: 01/08/2004
• Est. Priority Date: 02/20/1998
• Status: Active Grant

• Current Assignee: Kevin Wilson, Ron Hjorth
• Original Assignee: Kevin Wilson, Ron Hjorth
• Inventors: Wilson, Kevin, Hjorth, Ron
• Granted Patent: US 7,120,287 B2
• Time in Patent Office: Days
• US Class Current: 382/145
• CPC Class Codes: G05B 19/4183 characterised by data acquisition, e.g. workpiece identification
• CPC Class Codes: G05B 2219/31307 Identification structure is partly a copy of operating structure
• CPC Class Codes: G05B 2219/36371 Barcode reader
• CPC Class Codes: G05B 2219/45031 Manufacturing semiconductor wafers
• CPC Class Codes: H01L 21/67276 Production flow monitoring, e.g. for increasing throughput program-control systems per se G05B19/00, e.g. total factory control G05B19/418
• CPC Class Codes: H01L 21/67294 using identification means, e.g. labels on substrates or labels on containers
• CPC Class Codes: H01L 2223/5444 for electrical read out
• CPC Class Codes: H01L 2223/54473 for use after dicing
• CPC Class Codes: H01L 2223/5448 Located on chip prior to dicing and remaining on chip after dicing
• CPC Class Codes: H01L 2223/54486 Located on package parts, e.g. encapsulation, leads, package substrate
• CPC Class Codes: H01L 23/544 Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps test patterns for characterising or monitoring manufacturing processes H01L22/00
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: Y02P 90/02 Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]

Abstract

An inventive method tracks IC devices through the assembly steps in a manufacturing process. Prior to die attach, a laser scribe marks the lead frame of each of the devices with a coded hole matrix that gives each device a unique ID code. During die attach, an optical hole reader retrieves the ID code of each of the IC devices, and a computer system stores the retrieved ID codes in association with the lot numbers of the ICs attached to the lead frames. The ID codes of the devices are then read at each step in assembly so the devices can be tracked through assembly individually, rather than by lots. As a result, the devices can proceed through assembly in a more efficient, continuous manner (i.e., without breaks between lots).

Claims

1. An assembly method for a plurality of integrated circuit devices and a plurality of mounting substrates comprising:

providing a plurality of integrated circuit devices in multiple lots for assembling in a manufacturing process, each lot of the multiple lots having a plurality of integrated circuit devices therein;

mounting each integrated circuit device of the plurality of integrated circuit devices to a mounting substrate of the plurality of mounting substrates;

placing a substantially unique identification code on each mounting substrate of said plurality of mounting substrates in a readable position thereon;

placing an identification code on each integrated circuit device of the plurality of integrated circuit devices;

correlating the identification code of said each integrated circuit device mounted on the mounting substrate with the substantially unique identification code of the mounting substrate;

reading the substantially unique identification code of the mounting substrate of each integrated circuit device of the plurality of integrated circuit devices in each lot of the multiple lots;

performing a series of assembly steps in the manufacturing process on the plurality of integrated circuit devices in the multiple lots, said series of assembly steps including;

generating data related to the series of assembly steps of each integrated circuit device of the plurality of integrated circuit devices through the series of assembly steps;

associating the data generated for each integrated circuit device of the plurality of integrated circuit devices with the substantially unique identification code of an associated mounting substrate of the plurality of mounting substrates for tracking the multiple lots of the plurality of integrated circuit devices; and

at least one assembly step of the series of assembly steps in the manufacturing process including one of die attach, die cure, wire bond, molding, deflash, lead finish, trim and form, and opens/shorts testing.

2. The method of claim 1, wherein each integrated circuit device of the plurality of integrated circuit devices includes the mounting substrate selected from a group comprising a lead frame and a printed circuit board, and wherein each integrated circuit device of the plurality of integrated circuit devices is selected from another group comprising lead frame integrated circuit devices, Chip-on-Board (COB) integrated circuit devices, and flip-chip integrated circuit devices.

3. The method of claim 1, wherein the mounting substrate of each integrated circuit device of the plurality of integrated circuit devices is marked with an optically retrievable substantially unique identification code, and wherein reading the substantially unique identification code of the mounting substrate of each integrated circuit device of the plurality of integrated circuit devices comprises optically retrieving the substantially unique identification code of the mounting substrate of each integrated circuit device of the plurality of integrated circuit devices.

4. The method of claim 3, wherein the optically retrievable substantially unique identification code of each mounting substrate comprises one of a bar code, an Optical Character Recognition (OCR) code, and a coded hole matrix and wherein optically retrieving the substantially unique identification code of the mounting substrate of each integrated circuit device of the plurality of integrated circuit devices comprises retrieving the substantially unique identification code of the mounting substrate of each integrated circuit device of the plurality of integrated circuit devices with one of a bar code reader, an OCR reader, and an optical hole reader.

5. The method of claim 1, wherein the reading the substantially unique identification code of the mounting substrate of each integrated circuit device of the plurality of integrated circuit devices occurs before the manufacturing process.

6. The method of claim 1, wherein the performing a series of assembly steps in the manufacturing process on the plurality of integrated circuit devices comprises advancing the plurality of integrated circuit devices serially through multiple machines associated with the series of assembly steps.

7. The method of claim 1, wherein the performing a series of assembly steps in the manufacturing process comprises advancing the plurality of integrated circuit devices through parallel machines associated with the series of assembly steps.

8. The method of claim 1, wherein the generating data related to the series of assembly steps of each integrated circuit device of the plurality of integrated circuit devices through the assembly steps comprises generating at least one of assembly equipment data, assembly personnel data, assembly setup data, and time and date data.

9. The method of claim 1, further comprising storing the substantially unique identification code of the mounting substrate of each integrated circuit device of the plurality of integrated circuit devices and wherein the associating the data generated for each integrated circuit device of the plurality of integrated circuit devices with the substantially unique identification code of the mounting substrate of its associated integrated circuit device comprises storing the data generated for each integrated circuit device of the plurality of integrated circuit devices in association with the stored substantially unique identification code of the mounting substrate of its associated integrated circuit device.

10. The method of claim 9, wherein the storing the data generated for each integrated circuit device of the plurality of integrated circuit devices in association with the stored substantially unique identification code of the mounting substrate of its associated integrated circuit device comprises storing the data in a decentralized manner within a computer system so that at least partial access to the stored data may continue during a failure of a centralized portion of the computer system.

11. An assembly method for attaching a plurality of integrated circuit dice to a plurality of first substrates in multiple lots in manufacturing method comprising:

attaching at least two integrated circuit die of a plurality of integrated circuit dice on each first substrate of the plurality of first substrates;

separating each integrated circuit die of the plurality of integrated circuit dice on each first substrate of the plurality of first substrates, forming one integrated circuit die of a plurality of integrated circuit dice;

providing a plurality of mounting substrates, each mounting substrate of the plurality of mounting substrates marked with a substantially unique identification code;

providing a front-end identification code associated with each integrated circuit die of the plurality of integrated circuit dice;

reading the front-end identification code associated with each integrated circuit die of the plurality of integrated circuit dice;

reading the substantially unique identification code marked on each mounting substrate of the plurality of mounting substrates;

attaching each integrated circuit die of the plurality of integrated circuit dice attached to a portion of a first substrate to one mounting substrate of the plurality of mounting substrates for forming an integrated circuit device of a plurality of integrated circuit devices;

storing the front-end identification code associated with each integrated circuit die of the plurality of integrated circuit dice in each integrated circuit device of the plurality of integrated circuit devices in association with the substantially unique identification code of an associated mounting substrate of the plurality of mounting substrates;

performing an assembly step on each integrated circuit device of the plurality of integrated circuit devices including;

advancing the plurality of integrated circuit devices through at least one assembly step in a substantially continuous manner;

generating data related to the advancement of the plurality of integrated circuit devices through the at least one assembly step; and

associating the data generated for each integrated circuit device of the plurality of integrated circuit devices with the substantially unique identification code of an associated mounting substrate of the plurality of mounting substrates so the plurality of integrated circuit devices may be tracked through the assembly step; and

back-end testing each integrated circuit device of the plurality of integrated circuit devices.

12. The method of claim 11, further comprising:

storing a back-end identification code of each integrated circuit device of the plurality of integrated circuit devices in association with the substantially unique identification code of an associated mounting substrate of the plurality of mounting substrates; and

storing back-end testing-related data for each integrated circuit device of the plurality of integrated circuit devices in association with the back-end identification code of each integrated circuit device of the plurality of integrated circuit devices so the plurality of integrated circuit devices may be tracked through the back-end testing.

13. The method of claim 12, wherein storing the back-end identification code of each integrated circuit device of the plurality of integrated circuit devices comprises storing at least one of a fuse ID code and a lot number.

14. The method of claim 12, wherein the front-end identification code and back-end identification code associated with each integrated circuit device of the plurality of integrated circuit devices are identical.

15. The method of claim 11, wherein the providing the plurality of mounting substrates comprises providing substrates selected from a group comprising semiconductor wafers, Silicon-on-Sapphire (SOS) substrates, Silicon-on-Insulator (SOI) substrates, and Silicon-on-Glass (SOG) substrates.

16. The method of claim 11, wherein the fabricating a plurality of integrated circuit dice on each first substrate of the plurality of first substrates comprises fabricating integrated circuit dice selected from a group comprising Dynamic Random Access Memory (DRAM) ICs, Static Random Access Memory (SRAM) ICs, Synchronous DRAM (SDRAM) ICs, processor ICs, Application Specific ICs (ASICs), Read Only Memory (ROM) ICs, and Electrically Erasable Programmable ROM (EEPROM) ICs.

17. The method of claim 11, further comprising programming each integrated circuit die of the plurality of integrated circuit dice on each mounting substrate of the plurality of mounting substrates to permanently store a substantially unique fuse ID code, wherein the reading the front-end identification code associated with each integrated circuit die of the plurality of integrated circuit dice comprises reading the substantially unique fuse ID code programmed into each integrated circuit die of the plurality of integrated circuit dice.

18. The method of claim 17, wherein the programming each integrated circuit die of the plurality of integrated circuit dice on each mounting substrate of the plurality of mounting substrates to permanently store the substantially unique fuse ID code comprises programming at least one of fuses and anti-fuses in each integrated circuit die of the plurality of integrated circuit dice on each mounting substrate of the plurality of mounting substrates to permanently store the substantially unique fuse ID code.

19. The method of claim 11, wherein the providing the plurality of mounting substrates comprises marking each mounting substrate of the plurality of mounting substrates with an optically readable, substantially unique mounting substrate ID code selected from a group comprising a bar code, an Optical Character Recognition (OCR) code, and a coded hole matrix.

20. The method of claim 19, wherein each mounting substrate of the plurality of mounting substrates comprises one of a plurality of lead frames, and wherein the marking each mounting substrate of the plurality of mounting substrates comprises laser scribing a coded hole matrix in a lead frame rail of each lead frame of the plurality of lead frames.

21. The method of claim 11, wherein the reading the front-end identification code associated with each integrated circuit die of the plurality of integrated circuit dice comprises reading at least one of a lot number, a wafer number, and a fuse ID code associated with each integrated circuit die of the plurality of integrated circuit dice.

22. The method of claim 11, wherein the reading the substantially unique identification code of each mounting substrate of the plurality of mounting substrates comprises reading the substantially unique identification code of each mounting substrate with at least one of a bar code reader, an Optical Character Recognition (OCR) reader, and an optical hole reader.

23. The method of claim 11, wherein the reading the substantially unique identification code of each mounting substrate includes verifying the substantially unique identification code of each mounting substrate using a Cycle Redundancy Check (CRC).

24. The method of claim 11, wherein the providing the plurality of mounting substrates comprises providing at least one of a plurality of lead frames and a plurality of printed circuit boards.

25. The method of claim 11, further comprising verifying that the plurality of integrated circuit devices is supposed to progress through the assembly step before the advancing the plurality of integrated circuit devices through the at least one assembly step.

26. The method of claim 11, wherein the attaching each integrated circuit die of the plurality of integrated circuit dice comprises attaching each integrated circuit die of the plurality of integrated circuit dice using at least one of a Chip-on-Board (COB) technique and a flip-chip technique.