Inductor equivalent circuit and application thereof
First Claim
1. An inductor equivalent circuit comprising:
- a first resistor R1 having one terminal connected to ground;
a second resistor R2 having one terminal connected to ground;
a capacitor C1 having one terminal connected to ground;
a first transistor having a drain terminal coupling with an input signal and a source terminal coupling with said first resistor R1;
a second transistor having a source terminal coupling with said second resistor R1 and a gate terminal coupling said input signal;
a current mirror having a third transistor and a fourth transistor and having gate terminals thereof connecting to a source terminal of said third transistor to provide a reference current and a mirror current through said fourth transistor, and said fourth transistor having a source terminal coupling with said capacitor, a direct current source in parallel with said capacitor; and
thus constructing an equivalent inductor with a value about C1R2R1/n, wherein said n is a ratio of (W/L)4/(W/L)3, where (W/L)4 is the channel width over the channel length of said fourth transistor and (W/L)3 is the channel width over the channel length of said third transistor.
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Abstract
An inductor equivalent circuit is disclosed. The circuit comprises a reference current source, a first current mirror, a second current mirror, two operational amplifiers OP1 and OP2, a capacitor, a first transistor, a second transistor, a mirror resistor set, and a bypass current source in parallel with the capacitor. An input signal is through OP1 and second transistor to control the reference current source. The first mirror current is then feed-back a signal to the first transistor through an OP2. The current signal makes the drain current of the first transistor lags the input voltage signal by 90° due to the capacitor coupled with the first mirror current source. The mirror resistor set can be resistors having one common terminal grounded, and other terminals each, respectively, coupled with the first and the second transistor and the capacitor, or can be composed of transistors and all of them with gate property biased so that the transistors in the mirror resistor set are operated in an ohmic region. The second mirror current provides an output current of the inductor equivalent circuit for next cascade stage.
17 Citations
13 Claims
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1. An inductor equivalent circuit comprising:
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a first resistor R1 having one terminal connected to ground;
a second resistor R2 having one terminal connected to ground;
a capacitor C1 having one terminal connected to ground;
a first transistor having a drain terminal coupling with an input signal and a source terminal coupling with said first resistor R1;
a second transistor having a source terminal coupling with said second resistor R1 and a gate terminal coupling said input signal;
a current mirror having a third transistor and a fourth transistor and having gate terminals thereof connecting to a source terminal of said third transistor to provide a reference current and a mirror current through said fourth transistor, and said fourth transistor having a source terminal coupling with said capacitor, a direct current source in parallel with said capacitor; and
thus constructing an equivalent inductor with a value about C1R2R1/n, wherein said n is a ratio of (W/L)4/(W/L)3, where (W/L)4 is the channel width over the channel length of said fourth transistor and (W/L)3 is the channel width over the channel length of said third transistor. - View Dependent Claims (2, 3, 4, 5, 6)
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7. An inductor equivalent circuit comprising:
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a first transistor having a source terminal grounded;
a second transistor having a source terminal grounded, wherein said first transistor and said second transistor having gates thereof connecting to a gate bias signal, which enables said first transistor and said second transistor operate at ohmic region;
a third transistor having a drain terminal coupling with an input signal and a source terminal coupling with said first transistor;
a fourth transistor having a source terminal coupling with said second transistor and a gate terminal coupling said input signal;
a capacitor having one terminal connected to ground;
a current mirror having a fifth transistor, a sixth transistor, and seventh transistor and having gate terminals thereof connecting to a source terminal of said fifth transistor to provide a reference current through said fifth transistor and a first mirror current through said sixth transistor, and a second mirror current through said seventh transistor furthermore said sixth transistor having a source terminal coupling with said capacitor, a direct current source in parallel with said capacitor; and
thus constructing an equivalent inductor with a value about C1R2R1/n, where R1, R2 are equivalent resistances of said first transistor and said second transistor., and wherein said n is a ratio of (W/L)4/(W/L)3, where (W/L)4 is the channel width over the channel length of said fourth transistor and (W/L)3 is the channel width over the channel length of said third transistor. - View Dependent Claims (8, 9, 10, 11, 12, 13)
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Specification