Non-volatile semiconductor memory device

• US 20040008554A1
• Filed: 07/11/2003
• Published: 01/15/2004
• Est. Priority Date: 09/06/2001
• Status: Active Grant

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: Hitachi, Ltd., Hitachi ULSI Systems Company Limited (Hitachi, Ltd.)
• Inventors: Shiraishi, Atsushi, Katayama, Kunihiro, Kanamori, Motoki, Shikata, Atsushi, Kurakata, Shigeo
• Granted Patent: US 6,917,547 B2
• Time in Patent Office: Days
• US Class Current: 365/202
• CPC Class Codes: G06F 11/1068 in sector programmable memories, e.g. flash disk G06F11/1072 takes precedence
• CPC Class Codes: G11C 16/04 using variable threshold transistors, e.g. FAMOS
• CPC Class Codes: G11C 16/3431 Circuits or methods to detect disturbed nonvolatile memory cells, e.g. which still read as programmed but with threshold less than the program verify threshold or read as erased but with threshold greater than the erase verify threshold, and to reverse the disturbance via a refreshing programming or erasing step
• CPC Class Codes: G11C 2029/0411 Online error correction
• CPC Class Codes: G11C 29/76 using address translation or modifications
• CPC Class Codes: G11C 29/765 in solid state disks
• CPC Class Codes: G11C 29/81 using a hierarchical redundancy scheme
• CPC Class Codes: G11C 29/82 for EEPROMs

Abstract

When a non-volatile memory write error occurs in a card storage device containing a non-volatile memory and an error correction circuit, write data is read from the non-volatile memory and a check is made if the error can be corrected by the error correction circuit. If the error can be corrected, the write operation is ended. If the error correction circuit cannot correct the error, substitute processing is performed to write data into some other area.

Claims

1. A non-volatile semiconductor storage device comprising a controller and a non-volatile memory,

wherein said controller issues a storage instruction of data, received from an external unit, to said non-volatile memory with a first address specified,

wherein said non-volatile memory has an error correction circuit, reads the stored data when a data storage error occurred during the data storage operation executed in response to the storage instruction from said controller, checks, via said error correction circuit, if the data that was read can be corrected, notifies said controller of a storage completion if the data can be corrected, and notifies said controller of a storage failure if the data cannot be corrected, and

wherein, in response to the storage failure notification, said controller issues a storage instruction of the data transferred to said non-volatile memory, with a second address specified, said second address being a location where the data is to be stored.

2. A non-volatile semiconductor storage device according to claim 1,

wherein the storage instruction with the first address specified is a first write operation command supplying an address and data, and

wherein the storage instruction with the second address specified is a second write operation command supplying only an address.

3. A non-volatile semiconductor storage device comprising a controller, a volatile memory, a non-volatile memory, and an error correction circuit,

wherein said controller stores data, supplied from an external unit, into said volatile memory and issues a storage instruction to said non-volatile memory with a first address and the data supplied,

wherein, if a data storage error occurs during the data storage operation executed in response to the storage instruction from said controller, said non-volatile memory notifies said controller of a storage failure,

wherein, in response to the storage failure, said controller reads the data stored at the first address in said non-volatile memory, supplies the data that was read to said error correction circuit to check if the error can be corrected, completes the storage if the error can be corrected, and, if the error cannot be corrected, issues a storage instruction to said non-volatile memory with a second address and the data supplied, said data being stored in said volatile memory.

4. A non-volatile semiconductor storage device comprising a controller, a non-volatile memory, and an error correction circuit,

instruction of data, received from an external unit, to said non-volatile memory with a first address specified,

wherein said non-volatile memory reads the stored data when a data storage error occurred during the data storage operation executed in response to the storage instruction from said controller,

wherein said error correction circuit checks if the data that was read can be corrected, notifies said controller of a storage completion if the data can be corrected, and notifies said controller of a storage failure if the data cannot be corrected, and

wherein, in response to the storage failure notification, said controller issues a storage instruction of the data with a second address specified, said second address being a location where the data is to be stored.

5. A non-volatile semiconductor storage device according to claim 4,

wherein said non-volatile memory has a flag indicating that a recoverable write error has occurred,

wherein said controller references the flag and, if the flag is in a first state, issues a storage instruction of the data transferred to said non-volatile memory with the second address specified, said second address being a location where the data is to be stored, and, if the flag is in a second state, either completes the storage or issues a storage instruction of the data to said non-volatile memory with the second address specified, based on the a result of the checking, by said error correction circuit, if the error can be corrected.

6. A non-volatile semiconductor storage device according to claim 4,

wherein, if said error correction circuit can correct the error, said controller checks a number of correction bits to be corrected by said error correction circuit, completes the storage if the number of correction bits is smaller than n (positive integer), and, if the number of correction bits is larger than n but smaller than m (positive integer larger than n), reads the data from the first address in said non-volatile memory, causes said error correction circuit to perform correction, and stores the data in the first address in said non-volatile memory.

7. A non-volatile semiconductor storage device according to claim 4,

wherein said non-volatile memory is configured so that a write operation may be executed at a time for an area including the data storage area, specified by the first address, as a part and

wherein, if the data stored into and then read from said non-volatile memory can be corrected by said error correction circuit, said controller reads no-write data in the area that includes the storage area as a part and checks if some data was corrected by the error correction circuit and, if there is corrected data, stores the corrected data into the area.

8. A non-volatile semiconductor storage device according to claim 4,

wherein said controller counts, for each write unit area, a number of errors that are included in the data stored into and then read from said non-volatile memory and that can be corrected by said error correction circuit and, if the number of errors that can be corrected exceeds a predetermined number, does not complete the storage of the data even if the errors can be corrected by said error correction circuit but issues a storage instruction of the transferred data to said non-volatile memory with the second address specified, said second address being a location where the data is to be stored.

9. A non-volatile semiconductor storage device according to claim 8, wherein the number of errors that can be corrected by said error correction circuit is stored in a predetermined area within said non-volatile memory.

10. A non-volatile semiconductor storage device comprising a controller, a volatile memory, a non-volatile memory, and an error correction circuit,

wherein said controller causes said volatile memory to hold data supplied from an external unit, issues a storage instruction to said non-volatile memory with a first address and the data supplied, and reads data from said non-volatile memory with a second address supplied, holds it in said volatile memory, and then outputs the data to the external unit,

wherein said non-volatile memory comprises data latch means for holding the data supplied for storage and, if a data storage error occurs during the storage operation executed in response to the storage instruction from said controller, notifies said controller of a storage failure, and

wherein, in response to the storage failure notification, said controller reads the data stored at the first address of said non-volatile memory, supplies the data that was read to said error correction circuit, with a read-data path to said volatile memory blocked, for checking if the error can be corrected, completes the storage if the error can be corrected, and issues a storage instruction of the transferred data to said non-volatile memory with a third address specified if the error cannot be corrected.