Low-voltage high-speed frequency-divider circuit

• US 20040012416A1
• Filed: 05/21/2003
• Published: 01/22/2004
• Est. Priority Date: 05/21/2002
• Status: Active Grant

• Current Assignee: Hong Kong University of Science and Technology
• Original Assignee: Hong Kong University of Science and Technology
• Inventors: Cheung, Sin-Luen, Wong, Man-Chun, Luong, Howard Cam
• Granted Patent: US 6,831,489 B2
• Time in Patent Office: Days
• US Class Current: 327/115
• CPC Class Codes: H03K 23/542 with crossed-couplings, i.e. Johnson counters
• CPC Class Codes: H03K 3/356139 with synchronous operation
• CPC Class Codes: H03K 3/356147 using pass gates

Abstract

A frequency divider circuit is disclosed that generates output signals having a frequency substantially half of the frequency of the input signal. The circuit comprises two D-Flip-Flop circuits wherein one employs the said input signal and the other one employs the complement of the said input signal, and each of the two D-Flip-Flop circuits consists of a pair of loading transistors, two regenerative pairs coupled with each others, and two common-gate switches.

Claims

1. A frequency divider circuit that generates output signals having a frequency substantially half of the frequency of the input signal, comprising two D-Flip-Flop circuits wherein one employs the said input signal and the other one employs the complement of the said input signal, and wherein each of the two said D-Flip-Flop circuits consists of a pair of loading transistors, two regenerative transistor pairs coupled with each other, and two common-gate switches.

2. The circuit of claim 1, wherein the said pair of loading transistors comprise p-channel CMOS transistors.

3. The circuit of claim 1, wherein the said regenerative transistor pairs comprise four n-channel CMOS transistors.

4. The circuit of claim 1, wherein the said switches comprise an n-channel CMOS transistor operated in a common-gate configuration.

5. The circuit of claim 1, wherein the said pair of loading transistors comprise n-channel CMOS transistors.

6. The circuit of claim 1, wherein the said regenerative transistor pairs comprise four p-channel CMOS transistors.

7. The circuit of claim 1, wherein the said switches comprise a p-channel CMOS transistor operated in a common-gate configuration.