Methods of forming vertical mosfets having trench-based gate electrodes within deeper trench-based source electrodes
First Claim
1. A vertical MOSFET, comprising:
- a semiconductor substrate having a plurality of semiconductor mesas therein that are separated by a plurality of deep stripe-shaped trenches that extend in parallel and lengthwise across said substrate in a first direction;
a plurality of buried insulated source electrodes in the plurality of stripe-shaped trenches; and
a plurality of insulated gate electrodes that extend in parallel across the plurality of semiconductor mesas and into shallow trenches defined in said plurality of buried insulated source electrodes.
12 Assignments
0 Petitions
Accused Products
Abstract
Methods of forming vertical MOSFETs include forming a base region of second conductivity type in a semiconductor substrate having a drift region of first conductivity type therein that forms a P-N junction with the base region. A source region of first conductivity type is formed in the base region and a deep trench, having a first sidewall that extends adjacent the base region, is formed in the substrate. The deep trench is lined with a first electrically insulating layer. The deep trench is then refilled with a trench-based source electrode. The trench-based source electrode is selectively etched to define a shallow trench therein and expose a first portion of the first electrically insulating layer that extends on the first sidewall of the deep trench. The first portion of the first electrically insulating layer is selectively etched to expose an upper portion of the first sidewall of the deep trench and reveal the base region. The shallow trench is lined with a gate insulating layer that extends on the exposed upper portion of the first sidewall of the deep trench and a bottom and sidewalls of the shallow trench. A gate electrode is formed in the lined shallow trench. A surface source electrode is also formed. This source electrode electrically connects the trench-based source electrode, source region and base region together.
80 Citations
32 Claims
-
1. A vertical MOSFET, comprising:
-
a semiconductor substrate having a plurality of semiconductor mesas therein that are separated by a plurality of deep stripe-shaped trenches that extend in parallel and lengthwise across said substrate in a first direction;
a plurality of buried insulated source electrodes in the plurality of stripe-shaped trenches; and
a plurality of insulated gate electrodes that extend in parallel across the plurality of semiconductor mesas and into shallow trenches defined in said plurality of buried insulated source electrodes. - View Dependent Claims (2, 3, 4, 5)
-
-
6. A vertical MOSFET, comprising:
-
a semiconductor substrate having a drift region of first conductivity type therein;
first and second trenches that extend lengthwise in a first direction in said substrate and define a semiconductor mesa therebetween into which the drift region extends;
first and second buried insulated source electrodes that extend lengthwise in the first direction adjacent bottoms of said first and second trenches, respectively; and
first and second spaced-apart gate electrodes that each extend lengthwise in a second direction across the mesa and into upper portions of the first and second trenches. - View Dependent Claims (7, 8, 9, 10, 11)
-
-
12. A vertical MOSFET, comprising:
-
a semiconductor substrate having a drift region of first conductivity type therein;
first and second trenches that extend lengthwise in a first direction in said substrate and define a first semiconductor mesa therebetween into which the drift region extends;
a third trench that extends lengthwise in the first direction in said substrate and defines a second semiconductor mesa extending between said second and third trenches;
first, second and third insulating regions that line bottoms and sidewalls of said first, second and third trenches, respectively;
first, second and third buried source electrodes that extend lengthwise in said first, second and third trenches, respectively; and
a first insulated gate electrode that extends lengthwise in a second direction orthogonal to the first direction across the first and second mesas and into said second trench. - View Dependent Claims (13, 14, 15, 16, 17, 18)
-
-
19. A vertical MOSFET, comprising:
-
a semiconductor substrate having a plurality of semiconductor mesas therein that are separated by a plurality of deep stripe-shaped trenches that extend in parallel and lengthwise across said semiconductor substrate in a first direction, with each of the plurality of semiconductor mesas having at least one base region and at least one source region therein;
a plurality of buried insulated source electrodes that extend in the plurality of deep stripe-shaped trenches, with a first of said plurality of buried insulated source electrodes having a plurality of shallow trenches therein arranged at spaced locations along the length of a first of the plurality of deep stripe-shaped trenches; and
a plurality of insulated gate electrodes that extend in parallel across the plurality of semiconductor mesas in a second direction that extends at a non-zero angle relative to the first direction, with each of said plurality of insulated gate electrodes extending sufficiently deep into a respective shallow trench within the first of said plurality of buried insulated source electrodes that at least one respective vertical inversion layer channel is established in a respective base region within a first of the plurality of semiconductor mesas extending adjacent the first of the plurality of deep stripe-shaped trenches when the vertical MOSFET is biased in a forward on-state mode of operation. - View Dependent Claims (20, 21, 22)
-
-
23. A vertical MOSFET, comprising:
-
a semiconductor substrate having a plurality of semiconductor mesas therein that are separated by a plurality of deep stripe-shaped trenches that extend in parallel and lengthwise across said semiconductor substrate in a first direction, with each of the plurality of semiconductor mesas comprising a drift region, a transition region on the drift region, a base region on the transition region and a source region on the base region;
a plurality of buried insulated source electrodes that extend in the plurality of deep stripe-shaped trenches, with a first of said plurality of buried insulated source electrodes having a plurality of shallow trenches therein arranged at spaced locations along the length of a first of the plurality of deep stripe-shaped trenches; and
a plurality of insulated gate electrodes that extend in parallel across the plurality of semiconductor mesas in a second direction that extends at a non-zero angle relative to the first direction, with each of said plurality of insulated gate electrodes extending sufficiently deep into a respective shallow trench within the first of said plurality of buried insulated source electrodes that at least one respective vertical inversion layer channel is established in a respective base region within a first of the plurality of semiconductor mesas extending adjacent the first of the plurality of deep stripe-shaped trenches when the vertical MOSFET is biased in a forward on-state mode of operation.
-
-
24. A method of forming a vertical MOSFET, comprising the steps of:
-
forming a base region of second conductivity type in a semiconductor substrate having a drift region of first conductivity type therein that forms a P-N junction with the base region;
forming a source region of first conductivity type in the base region;
forming a deep trench having a first sidewall that extends adjacent the base region, in the semiconductor substrate;
lining the deep trench with a first electrically insulating layer;
refilling the lined deep trench with a trench-based source electrode;
selectively etching the trench-based source electrode to define a shallow trench therein and expose a first portion of the first electrically insulating layer that extends on the first sidewall of the deep trench;
selectively etching the first portion of the first electrically insulating layer to expose an upper portion of the first sidewall of the deep trench and reveal the base region;
lining the shallow trench with a gate insulating layer that extends on the exposed upper portion of the first sidewall of the deep trench and a bottom and sidewalls of the shallow trench;
forming a gate electrode that extends on a surface of the semiconductor substrate and extends into the lined shallow trench; and
forming a surface source electrode that electrically connects the trench-based source electrode, source region and base region together. - View Dependent Claims (25, 26, 27, 28, 30)
-
-
29. A method of forming a vertical MOSFET, comprising the steps of:
-
forming a semiconductor substrate having therein a drift region, a transition region on the drift region, a base region on the transition region and a source region on the base region;
forming a deep trench having a first sidewall that extends adjacent the base, transition and drift regions, in the semiconductor substrate;
forming a trench-based source electrode in the deep trench;
forming a shallow trench that exposes the base region and source region extending along the first sidewall, in the trench-based source electrode;
forming a gate oxide insulating layer on the exposed base region;
forming a gate electrode that extends on an upper surface of the semiconductor substrate and extends into the shallow trench; and
forming a surface source electrode that electrically connects the trench-based source electrode, source region and base region together. - View Dependent Claims (31, 32)
-
Specification