Current chopper-type D class power amplifier
First Claim
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1. A power amplifier feeding a direct current corresponding to an input voltage to a load connected between first and second output nodes, comprising:
- first and second transistors electrically connected between a power supply voltage and a common voltage and said first output node respectively;
third and fourth transistors electrically connected between said power supply voltage and said common voltage and said second output node respectively;
a first mirror transistor connected between one voltage of said power supply voltage and said common voltage and said first output node to form a current mirror with corresponding one of said first and second transistors;
a second mirror transistor connected between said one voltage and said second output node to form a current mirror with corresponding one of said third and fourth transistors;
a first detection resistance connected in series with said first mirror transistor;
a second detection resistance connected in series with said second mirror transistor;
a carrier wave generation circuit generating a carrier wave oscillating in a prescribed cycle;
a switching control circuit for indicating switching between a power supply mode and a resurrection charging current mode by a bridge formed with said first to fourth transistors to feed said direct current corresponding to a voltage difference between a reference voltage and said input voltage;
a first drive control circuit controlling on-off switching of said first and second transistors in response to an indication from said switching control circuit based on a prescribed level transition of said carrier wave, said voltage difference and voltage drop at said second detection resistance; and
a second drive control circuit controlling on-off switching of said third and fourth transistors in response to an indication from said switching control circuit based on said prescribed level transition of said carrier wave, said voltage difference and voltage drop at said first detection resistance.
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Abstract
An output current fed to a load is controlled by a full bridge formed with first to fourth transistors. First and second mirror transistors provided to form current mirrors with transistors forming the full bridge, and first and second detection resistances respectively connected to the first and second mirror transistors in series are provided. Operations of the full bridge are controlled corresponding to detection voltages at the first and second detection resistances. Further, on-off switching of transistors belonging to one side of the bridge is controlled corresponding to voltage drop at the detection resistance provided corresponding to the other side of the bridge.
11 Citations
8 Claims
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1. A power amplifier feeding a direct current corresponding to an input voltage to a load connected between first and second output nodes, comprising:
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first and second transistors electrically connected between a power supply voltage and a common voltage and said first output node respectively;
third and fourth transistors electrically connected between said power supply voltage and said common voltage and said second output node respectively;
a first mirror transistor connected between one voltage of said power supply voltage and said common voltage and said first output node to form a current mirror with corresponding one of said first and second transistors;
a second mirror transistor connected between said one voltage and said second output node to form a current mirror with corresponding one of said third and fourth transistors;
a first detection resistance connected in series with said first mirror transistor;
a second detection resistance connected in series with said second mirror transistor;
a carrier wave generation circuit generating a carrier wave oscillating in a prescribed cycle;
a switching control circuit for indicating switching between a power supply mode and a resurrection charging current mode by a bridge formed with said first to fourth transistors to feed said direct current corresponding to a voltage difference between a reference voltage and said input voltage;
a first drive control circuit controlling on-off switching of said first and second transistors in response to an indication from said switching control circuit based on a prescribed level transition of said carrier wave, said voltage difference and voltage drop at said second detection resistance; and
a second drive control circuit controlling on-off switching of said third and fourth transistors in response to an indication from said switching control circuit based on said prescribed level transition of said carrier wave, said voltage difference and voltage drop at said first detection resistance. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A power amplifier feeding a direct current corresponding to an input voltage to a load connected between first and second output nodes, comprising:
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first and second transistors electrically connected between a power supply voltage and a common voltage and said first output node respectively;
third and fourth transistors electrically connected between said power supply voltage and said common voltage and said second output node respectively;
a first mirror transistor connected between one voltage of said power supply voltage and said common voltage and said first output node to form a current mirror with corresponding one of said first and second transistors;
a second mirror transistor connected between said one voltage and said second output node to form a current mirror with corresponding one of said third and fourth transistors;
a first detection resistance connected in series with said first mirror transistor;
a second detection resistance connected in series with said second mirror transistor;
a carrier wave generation circuit generating a carrier wave oscillating in a prescribed cycle;
a switching control circuit for indicating switching between a power supply mode and a resurrection charging current mode by a bridge formed with said first to fourth transistors based on a voltage difference between a reference voltage and said input voltage, a prescribed level transition of said carrier wave, said voltage difference, and voltage drop at said first and second detection resistances; and
a drive control circuit controlling on-off switching of said first to fourth transistors in response to an indication from said switching control circuit. - View Dependent Claims (8)
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Specification
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Current AssigneeRenesas Technology Corporation (Renesas Electronics Corporation)
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Original AssigneeRenesas Technology Corporation (Renesas Electronics Corporation)
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InventorsMiyazaki, Katsumi
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Application NumberUS10/334,001Publication NumberTime in Patent OfficeDaysField of SearchUS Class Current330/10CPC Class CodesH03F 3/2171 with field-effect devices H...H03F 3/2173 of the bridge type
