Tuning circuit

• US 20040017273A1
• Filed: 06/04/2003
• Published: 01/29/2004
• Est. Priority Date: 07/26/2002
• Status: Active Grant

• Current Assignee: General Research of Electronics, Inc.
• Original Assignee: General Research of Electronics, Inc.
• Inventors: Kawai, Kazuo
• Granted Patent: US 6,836,199 B2
• Time in Patent Office: Days
• US Class Current: 333/214
• CPC Class Codes: H03H 11/52 simulating negative resistances

Abstract

In order to improve Q of a tuning circuit by using a negative resistance circuit, a tuning circuit wherein a frequency selectivity characteristic and a tuning circuit gain does not vary and are kept constant values even if a tuning frequency is changed, is provided. The tuning circuit is constructed so as to compensate a series resistance component by connecting a negative resistance circuit to a series resonance circuit. The negative resistance circuit includes a differential amplifying circuit having two transistors emitters of which are connected in common, and a low output impedance circuit such as an emitter follower. The low impedance output is fed back to a same phase input side of the differential amplifying circuit directly and also to an inverse phase input side thereof to obtain a negative resistance value at this inverse input terminal.

Claims

1. A tuning circuit comprising a series resonance circuit, a driving circuit connected to one side of the series resonance circuit and a negative resistance circuit connected to other side of the series resonance circuit, said negative resistance circuit consisting of a differential amplifying circuit connected to the series resonance circuit and a low output impedance circuit connected to the differential amplifying circuit, an output of the low output impedance circuit being fed back directly to a same phase input side of the differential amplifying circuit and to an inverse phase side thereof through a negative resistance value setting resistor, and a tuned output signal being taken out from a same phase output side of the differential amplifying circuit.

2. A tuning circuit according to claim 1 wherein said differential amplifying circuit includes two transistors emitters of which are connected with each other in common and the low output impedance circuit is an emitter follower circuit.