Reconfigurable protocols and architectures for wireless networks

• US 20040017829A1
• Filed: 12/13/2002
• Published: 01/29/2004
• Est. Priority Date: 12/14/2001
• Status: Active Grant

• Current Assignee: California Institute of Technology
• Original Assignee: California Institute of Technology
• Inventors: Arabshahi, Payman, Okino, Clayton M., Gray, Andrew A., Yan, Tsun-Yee
• Granted Patent: US 7,602,792 B2
• Time in Patent Office: Days
• US Class Current: 370/469
• CPC Class Codes: H04L 69/08 Protocols for interworking; Protocol conversion
• CPC Class Codes: H04L 69/12 Protocol engines
• CPC Class Codes: H04L 69/18 Multiprotocol handlers, e.g. single devices capable of handling multiple protocols
• CPC Class Codes: H04W 40/02 Communication route or path selection, e.g. power-based or shortest path routing
• CPC Class Codes: H04W 84/22 with access to wired networks
• CPC Class Codes: Y02D 30/70 in wireless communication networks

Abstract

A reconfigurable architecture for wireless digital data and voice communications is provided for ad hoc and/or an ad hoc collection of organized networks. At least some user wireless communication units serve as relay stations for other users units, enabling any user within the range of another, participating user to gain access to the local- and wider-area networks in a multihop process. Reconfigurable hardware enables dynamic protocol “preferencing”, and easy upgrades to potential future wireless protocol standards. Power-efficient communication takes place by using multihop radio communication at the local level and high-speed point-to-point links (e.g. fiber, satellite) at the global level. Microcells within a network community are aggregated into cells by use of a local-area-network (LAN) backbone of higher speed wireless and/or wired connections. Every time a microcell connects to the wireless backbone, microcells or individual users in surrounding blocks can also connect to the network.

Claims

1. An apparatus for reconfiguring a plurality of networks, each having a different network protocol into an intercommunicated network comprising:

a protocol stack; and

a reconfigurable protocol chip coupled the protocol stack.

2. The apparatus of claim 1 where the protocol stack comprises in sequence and communicated to each other an application layer, a transport layer, a network layer, a data link layer and a physical layer.

3. The apparatus of claim 2 wherein the network layer and data link layer are included at least in part in the reconfigurable protocol chip.

4. The apparatus of claim 3 wherein the transport layer and physical layer are communicated to the reconfigurable protocol chip.

5. The apparatus of claim 1 wherein the reconfigurable protocol chip is comprised of:

a dynamically reconfigurable protocol realization module communicated to the physical layer;

a protocol sensing module communicated to the physical layer;

a reconfiguration control engine communicated to the protocol sensing module and to the dynamically reconfigurable protocol realization module;

a protocol selection module communicated to the protocol sensing module and to the reconfiguration control engine; and

a memory for storing a plurality of different network protocols.

6. The apparatus of claim 5 wherein the dynamically reconfigurable protocol realization module is implemented within a dynamic field programmable gate array.

7. The apparatus of claim 5 wherein the protocol sensing module, the reconfiguration control engine, and the protocol selection module are implemented within a control field programmable gate array.

8. The apparatus of claim 5 wherein the memory is implemented in a flash memory.

9. The apparatus of claim 5 wherein the dynamically reconfigurable protocol realization module is implemented within a dynamic field programmable gate array and within a software controlled processor.

10. The apparatus of claim 5 wherein the protocol sensing module is implemented within a control field programmable gate array, and wherein the reconfiguration control engine, and the protocol selection module are implemented within the control field programmable gate array and a software controlled processor.

11. The apparatus of claim 5 where the protocol sensing module is comprised of a course acquisition loop for generation of multiple confidence states of valid protocol detection, and a fine tracking loop for allowance of some degradation of information.

12. The apparatus of claim 5 where the protocol sensing module identifies network protocols by analyzing periodic frame headers and preambles.

13. The apparatus of claim 5 where the protocol sensing module generates a command on detection of a network protocol and where the reconfiguration control engine reconfigures the dynamic protocol realization in response to the command from the protocol sensing module.

14. The apparatus of claim 5 where the protocol sensing module generates a command on detection of a network protocol and where protocol selection module fetches a stored network protocol from the memory in response to the command from the protocol sensing module.

15. The apparatus of claim 5 where protocol selection module interfaces the memory with the reconfiguration control engine.

16. A method for reconfiguring a plurality of networks, each having a different network protocol into an intercommunicated network comprising:

providing a protocol stack; and

communicating a reconfigurable protocol chip coupled the protocol stack.

17. The method of claim 16 where providing the protocol stack comprises providing an application layer, a transport layer, a network layer, a data link layer and a physical layer, and serially communicating the layers with each other.

18. The method of claim 17 wherein providing the network layer and data link layer includes providing the network layer and data link layer at least in part in the reconfigurable protocol chip.

19. The method of claim 18 wherein providing the transport layer and physical layer includes communicating the transport layer and physical layer to the reconfigurable protocol chip.

20. The method of claim 16 wherein communicating the reconfigurable protocol chip comprises communicating a dynamically reconfigurable protocol realization module to the physical layer;

communicating a protocol sensing module to the physical layer;

communicating a reconfiguration control engine to the protocol sensing module and to the dynamically reconfigurable protocol realization module;

communicating a communicated selection module to the protocol sensing module and to the reconfiguration control engine; and

communicating a memory for storing a plurality of different network protocols to the protocol sensing module.

21. The method of claim 20 further comprising implementing the dynamically reconfigurable protocol realization module within a dynamic field programmable gate array.

22. The method of claim 20 further comprising implementing the protocol sensing module, the reconfiguration control engine, and the protocol selection module within a control field programmable gate array.

23. The method of claim 20 further comprising implementing the memory in a flash memory.

24. The method of claim 20 further comprising implementing the dynamically reconfigurable protocol realization module within a dynamic field programmable gate array and within a software controlled processor.

25. The method of claim 20 further comprising implementing the protocol sensing module within a control field programmable gate array, and the reconfiguration control engine, and the protocol selection module within the control field programmable gate array and a software controlled processor.

26. The method of claim 20 further comprising generating multiple confidence states of valid protocol detection in a course acquisition loop included in the protocol sensing module and allowing some degradation of information in a fine tracking loop included in the protocol sensing module.

27. The method of claim 20 further comprising identifying network protocols in the protocol sensing module by analyzing periodic frame headers and preambles.

28. The method of claim 20 further comprising generating a command on detection of a network protocol in the protocol sensing module and reconfiguring the dynamic protocol realization in response to the command from the protocol sensing module by means of the control engine.

29. The method of claim 20 further comprising generating a command on detection of a network protocol in the protocol sensing module and fetching a stored network protocol from the memory in response to the command from the protocol sensing module by means of the selection module.

30. The method of claim 20 further comprising interfacing the memory with the reconfiguration control engine by means of the protocol selection module.