Field plate transistor with reduced field plate resistance
First Claim
Patent Images
1. A transistor, the transistor comprising:
- a source;
a gate;
a drain;
a field plate located between the gate and the drain, wherein said field plate comprises a plurality of connection locations; and
a plurality of electrical connectors connecting said plurality of connection locations to a potential.
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Abstract
In one example embodiment, a transistor (100) is provided. The transistor (100) comprises a source (10), a gate (30), a drain (20), and a field plate (40) located between the gate (30) and the drain (20). The field plate (40) comprises a plurality of connection locations (47) and a plurality of electrical connectors (45) connecting said plurality of connection locations (47) to a potential.
47 Citations
18 Claims
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1. A transistor, the transistor comprising:
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a source;
a gate;
a drain;
a field plate located between the gate and the drain, wherein said field plate comprises a plurality of connection locations; and
a plurality of electrical connectors connecting said plurality of connection locations to a potential. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A system for reduction of gate-to-drain capacitance in a transistor, the system comprising:
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means for connecting a plurality of locations on a field plate finger to a potential, the field plate finger being located between a drain of a transistor and a source of the transistor; and
means for applying a voltage to the means for connecting. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18)
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Specification