Centrally synchronized distributed switch

• US 20040027261A1
• Filed: 03/14/2003
• Published: 02/12/2004
• Est. Priority Date: 03/15/2002
• Status: Abandoned Application

• Current Assignee: PMC-Sierra Incorporated (Microchip Technology Incorporated)
• Original Assignee: PMC-Sierra Incorporated (Microchip Technology Incorporated)
• Inventors: Oliver, Gordon, Tymchuk, Kevin Bruce, Dillabough, Jeff D.
• Application Number:
  US10/387,445
• Publication Number:
  US 20040027261A1
• Time in Patent Office: Days
• US Class Current: 341/111
• CPC Class Codes: H04Q 11/06 Time-space-time switching

Abstract

The present invention comprises a centrally synchronized distributed time-space-time switch fabric wherein connection memory page (CMP) selection information is communicated to remote devices without having to add any extra hardware to the system. The central processor only needs to communicate to the space switch device, and by writing to certain registers in the space switch the processor can control the CMP selection in each of the time switch devices. By providing the page selection information over the same signals that transfer data, these page selection signals do not have to be routed externally or controlled by the distributed software.

Claims

1. A centrally synchronized distributed switch, comprising:

a) a control processor;

b) at least one space switch coupled to said control processor; and

c) at least one time switch coupled to said space switch by a serial link;

wherein each of said space switch and said time switch comprises an on-line configuration page and an off-line configuration page, and

wherein configuration page selection information generated by said control processor is sent to said time switch in-band over said serial link.

2. The switch according to claim 1, wherein said switch comprises two types of time switches, namely, input time switches and output time switches.

3. The switch according to claim 1, wherein said control processor sends a common system frame pulse to each one of said time and space switches.

4. The switch according to claim 3, wherein said configuration pages are sampled only during said common system frame pulse.

5. The switch according to claim 1, wherein said configuration page selection information is written into registers in said space switch before being sent to said time switches.

6. The switch of claim 1, wherein said configuration page selection information is CRC protected.

7. The switch of claim 6, wherein said configuration page selection information is disregarded if a CRC error is detected.

8. The switch of claim 1, wherein data on said serial links is 8B/10B encoded.

9. The switch of claim 1, wherein said configuration page selection information is sent to said time switches via dedicated overhead bytes.

15. A method of synchronizing a switch defined in claim 1, comprising sending said configuration page selection information to said time switches in-band over said serial links.

16. The method of claim 15, further comprising the following two steps, which are carried out prior to sending said configuration page selection information to said time switches:

a) writing configuration page selection information for said time switches to a register in said space switch; and

b) writing configuration page selection information for said space switch.

17. The method according to claim 16, further comprising the following two steps, which are carried out prior to writing said configuration page selection information for said time switches to said register:

a) generating a common system frame pulse;

b) enabling a frame interrupt in said space switch; and

c) generating a frame interrupt on said common system frame pulse.

18. The method according to claim 17, further comprising the following step, which is carried out after said configuration page selection information is sent to said time switches:

a) disabling said frame interrupt.

10. A centrally synchronized distributed switch, comprising:

a) a control processor;

b) at least one space switch coupled to said control processor;

c) a plurality of input time switches each coupled to said space switch by a serial link; and

d) a plurality of output time switches each coupled to said space switch device by a serial link;

wherein each of said space switch, said input time switches and said output time switches comprises an on-line configuration page and an off-line configuration page, and

wherein configuration page selection information is sent to said input and output time switches in-band over said serial links.

11. A method of synchronizing a distributed switch having a control processor, at least one space switch coupled to said control processor, and a plurality of time switches each coupled to said space switch by a serial link, said method comprising sending configuration page selection information to said time switches in-band over said serial links.

12. The method according to claim 11, further comprising the following two steps, which are carried out prior to sending said configuration page selection information:

a) writing said configuration page selection information for said time switches to a register in said space switch; and

b) writing said configuration page selection information for said space switch.

13. The method according to claim 11, further comprising the following two steps, which are carried out prior to writing said configuration page selection information for said time switches to said register:

a) generating a common system frame pulse;

b) enabling a frame interrupt in said space switch; and

c) generating a frame interrupt on said common system frame pulse.

14. The method according to claim 13, further comprising the following step, which is carried out after said configuration page selection information is sent to said time switches:

a) disabling said frame interrupt.