Network packet processing

• US 20040028044A1
• Filed: 08/07/2002
• Published: 02/12/2004
• Est. Priority Date: 08/07/2002
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Hooper, Donald F.
• Granted Patent: US 7,248,584 B2
• Time in Patent Office: Days
• US Class Current: 370/392
• CPC Class Codes: H04L 45/00 Routing or path finding of packets in data switching networks routing or path finding in wireless networks H04W40/00
• CPC Class Codes: H04L 45/60 Router architectures
• CPC Class Codes: H04L 45/742 Route cache; Operation thereof
• CPC Class Codes: H04L 69/14 Multichannel or multilink protocols
• CPC Class Codes: H04L 69/22 Parsing or analysis of headers
• CPC Class Codes: H04L 9/40 Network security protocols

Abstract

The disclosure includes description of techniques for processing a network packet received at a network device. An example of the technique includes, in a first path, performing packet processing phases upon the network packet and storing state data for the phase phases. A second path can access the state data stored by the first path and determine a phase to perform next.

Claims

1. A method of processing a network packet received at a network device, the method comprising:

in a first path;

performing at least one of a collection of packet processing phases upon the network packet;

storing state data for the at least one of the collection of phases; and

in a second path;

accessing the state data stored by the first path; and

based on the accessed state data, determining a phase in the collection of phases to perform next.

2. The method of claim 1, further comprising, after determining a phase to perform next, proceeding with the performance of the collection of phases.

3. The method of claim 1,

wherein performing at least one of a collection of packet processing phases upon the network packet comprises performing more than one phase;

and

wherein storing state data comprises storing state data for each phase.

4. The method of claim 1, wherein different phases feature different sets of state data.

5. The method of claim 1, wherein the phases comprise at least one of the following:

verifying at least a portion of the packet'"'"'s header(s) and determining how to forward the packet.

6. The method of claim 1, wherein a subset of the phases are conditionally performed.

7. The method of claim 6, wherein the subset of phases comprise a lookup operation.

8. The method of claim 1, further comprising defining the collection of packet processing phases.

9. The method of claim 8, wherein defining the collection of packet processing phases comprises including instructions that identify state data.

10. The method of claim 1, further comprising, determining a time budget for processing by the first path.

11. The method of claim 1, wherein the first and second paths comprise paths provided by different, respective, threads.

12. The method of claim 1, wherein the first and second paths comprise paths provided by different, respective, processors.

13. The method of claim 1, wherein the device comprises a network processor.

14. The method of claim 13, wherein the network processor comprises multiple programmable packet processors.

15. The method of claim 13, wherein the packet processor comprises a packet processor having an instruction set that does not feature floating point operation instructions.

16. The method of claim 1, wherein determining which phase to perform next comprises determining the last phase completed by the first path.

17. The method of claim 1, wherein the phases are numbered sequentially based on a worst-case traversal of the collection of phases.

18. The method of claim 1, wherein the state data includes an identifier of the corresponding phase and wherein the determining a phase to perform next comprises determining based on the identifier.

19. A computer program product, disposed on a computer readable medium, for processing a network packet received at a network device, the program including instructions for causing a processor to:

access state data stored by a first path while processing the network packet, the state data corresponding to a phase within a collection of packet processing phases; and

based on the accessed state data, determining a phase in the collection of phases to perform next.

20. The program of claim 19, further comprising instructions for causing the processor to, after determining a phase to perform next, proceed with the performance of the collection of phases.

21. The program of claim 19, wherein different phases feature different sets of state data.

22. The program of claim 19, wherein the phases comprise at least one of the following:

verifying at least a portion of the packet'"'"'s header(s) and determining how to forward the packet.

23. The program of claim 19, wherein a subset of the phases are conditionally performed.

24. The program of claim 23, wherein the subset of phases comprise a lookup operation.

25. The program of claim 19, wherein the program comprises instructions for programming a programmable packet processor.

26. The program of claim 19, wherein the state data includes an identifier of the corresponding phase and wherein the instructions for causing the processor to determine a phase to perform next comprise instructions for determining based on the identifier.

27. A system for processing a network packet received at a network device, the system comprising:

at least one communication port;

at least one Ethernet MAC (Medium Access Control) device coupled to at least one of the at least one communication ports;

at least one processor; and

instructions for causing at least one of the at least one processors to process a network packet received via a one of the at least one communication ports and a one of the at least one Ethernet MAC controllers, the instructions for causing the at least one processor to;

in a first path;

perform at least one of a collection of packet processing phases upon the network packet;

store state data for the at least one of the collection of phases; and

in a second path;

access the state data stored by the first path; and

based on the accessed state data, determine a phase in the collection of phases to perform next.

28. The system of claim 27, wherein the at least one processor comprises more than one programmable packet processors having instructions sets that do not feature floating point operation instructions.

29. The system of claim 27, wherein the state data comprises an identifier of the phase and wherein determining a phase to perform next comprises determining a phase based on the identifier.

30. The system of claim 27, wherein the phases comprises phases that perform at least one of the following operations:

a lookup based on information included in the packet header(s) and verification of at least one header.