Organic field-effect transistor (ofet), a production method therefor, an integrated circut constructed from the same and their uses

• US 20040029310A1
• Filed: 07/14/2003
• Published: 02/12/2004
• Est. Priority Date: 08/18/2000
• Status: Abandoned Application

• Current Assignee: PolyIC GmbH & Co. KG (Leonhard KURZ Stiftung & Company KG)
• Original Assignee: PolyIC GmbH & Co. KG (Leonhard KURZ Stiftung & Company KG)
• Inventors: Bernds, Adoft, Rost, Henning, Clemens, Wolfgang, Fix, Walter
• Application Number:
  US10/344,951
• Publication Number:
  US 20040029310A1
• Time in Patent Office: Days
• US Class Current: 438/99
• CPC Class Codes: H10K 10/468 characterised by the gate dielectrics
• CPC Class Codes: H10K 10/491 Vertical transistors, e.g. vertical carbon nanotube field effect transistors [CNT-FETs]
• CPC Class Codes: H10K 19/00 Integrated devices, or assemblies of multiple devices, comprising at least one organic element specially adapted for rectifying, amplifying, oscillating or switching, covered by group H10K10/00
• CPC Class Codes: H10K 19/80 Interconnections, e.g. terminals
• CPC Class Codes: H10K 71/13 using printing techniques, e.g. ink-jet printing or screen printing
• CPC Class Codes: H10K 85/113 Heteroaromatic compounds comprising sulfur or selene, e.g. polythiophene

Abstract

The invention relates to an organic field-effect transistor with an improved performance. The output current is increased by the arrangement of several current channels on the OFET, all of which contribute to the output current. By positioning the source and drain electrode on a plane which is not parallel to the surface of the substrate, it is possible to reduce the distances between the source and the drain in relation to those previously attainable. This produces shorter current channels with faster switching speeds. Finally, the invention relates to integrated circuits, which are stacked on a substrate to save space.

Claims

1. An organic field-effect transistor on a substrate, at least one semiconducting layer connecting at least one drain and one source electrode, at least two insulating layers and at least one conductive layer with a gate electrode being applied on the substrate in such a way that after a voltage has been applied to the gate electrode, the field effect gives rise to at least two current channels and/or a current channel running vertically, that is to say transversely with respect to the surface of the substrate.

2. The organic field-effect transistor as claimed in claim 1, having at least two gate electrodes.

3. The organic field-effect transistor as claimed in claim 1 or 2, in which both sides of a gate electrode are used for producing two current channels.

4. The organic field-effect transistor as claimed in one of the preceding claims, in which at least two current channels with different geometries are present.

5. The organic field-effect transistor as claimed in one of the preceding claims, in which there is a short-circuiting circuit between at least two gate electrodes.

6. The organic field-effect transistor as claimed in one of the preceding claims, in which the first insulator layer and/or the drain electrode are applied in patterned fashion.

7. The organic field-effect transistor as claimed in one of the preceding claims, in which the patterning of the first insulator layer and the patterning of the drain electrode are identical.

8. The organic field-effect transistor as claimed in one of the preceding claims, in which the gate electrode is applied in patterned fashion.

10. An integrated circuit, which comprises at least one field-effect transistor as claimed in one of claims 1 to 9.

13. The integrated circuit as claimed in one of the preceding claims 10 to 12, which comprises at least two organic field-effect transistors.

14. The integrated circuit as claimed in one of the preceding claims 10 to 13, in which, with a stacked arrangement, the covering and/or encapsulation of a lower transistor serves as substrate and/or carrier of an upper transistor.

15. The integrated circuit as claimed in one of the preceding claims 10 to 14, in which the encapsulation of a lower transistor, with a stacked arrangement, has a thickness of greater than 200 nm.

9. An organic field-effect transistor having a distance between source and drain electrodes of less than 1 μ

m at least at one location.

11. The integrated circuit, in which at least two transistors are arranged in stacked fashion.

12. The integrated circuit, in which the usable surface of the substrate is a multiple of its actual surface.

16. A method for producing an integrated circuit by stacking and/or arranging one beside the other at least two transistors.

17. The method as claimed in claim 16, in which at least two organic field-effect transistors are stacked.

18. The uses of an integrated circuit having at least two transistors, which are arranged in stacked fashion, for constructing logic circuits.

19. A method for producing an OFET, comprising the following work steps:

application of a lower electrode to a substrate,

application of a first layer made of insulator to the lower electrode,

application of an upper electrode to the first insulator,

patterning of the upper electrode and of the first insulator layer;

the patterning of the first insulating layer must be effected in one work step with the patterning of the drain/source and the structures must be identical at least at the edges at which a vertical current channel forms.

connection of the two electrodes by a coating with semiconducting material,

covering of the semiconducting layer with the second insulator,

application and patterning of the gate electrode to the second insulator at least where the semiconducting layer, connects the other two electrodes.

20. The method as claimed in claim 19, the bottom electrode likewise being patterned.

21. A method for producing a multiple channel OFET by applying patterned organic layers, for example polymers, to a substrate.

22. The method as claimed in claim 21, in which the patterned organic layers are applied to the substrate at least partly by printing.

23. The method as claimed in either of claims 21 and 22, in which the patterned polymer layers are applied to the substrate at least partly by spin-on, vapor deposition, and/or sputtering on with subsequent lithography.

24. The driving of organic DISPLAYS in integrated organic circuits for information processing with data rates of more than 200 bits, preferably from 1 000 bits (kbit) per second (integrated circuit having at least one OFET).

25. An RFID tag having at least one integrated circuit which comprises at least two transistors arranged in stacked fashion.