Method of regulating the supply voltage of a load and related voltage regulator
First Claim
1. A method of regulating the supply voltage of a load by a switching voltage regulator having an inductor (L) driven by at least a power switch for delivering current to an output capacitor (COUT) with a certain parasitic series resistance (ESR) connected between an output node of the regulator and ground and to an electric load connected in parallel to the capacitor, comprising the steps of establishing a reference voltage (V′
-
REF), generating a comparison signal (VCOMP) as the sum of a first voltage signal (RSIL) proportional to the current circulating in the inductor (L) according to a certain proportionality coefficient (RS) and of a second voltage signal (VINT) function of the difference between the output voltage (VOUT) and said reference voltage (V′
REF) and of said first voltage signal, comparing said comparison signal (VCOMP) with at least a threshold for generating a logic signal that switches between an active state and an inactive state and viceversa each time that said threshold is crossed, commanding the turn on or the turn off of said power switch in function of the state of said logic signal, characterized in that said second voltage signal (VINT) is generated by integrating the sum between said first signal and the difference, multiplied by a certain quantity (α
), between the output voltage (VOUT) of the regulator and said reference voltage (V′
REF).
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Accused Products
Abstract
The method is for regulating the supply voltage of a load via a switching voltage regulator having an inductor driven by at least a power switch for delivering current to an output capacitor having a certain parasitic series resistance, connected between the output node of the regulator and ground and to an electric load eventually connected in parallel to the output capacitor. The method includes establishing a reference voltage, generating a comparison signal as the sum of a first voltage signal proportional to the current circulating in the inductor and of a second voltage signal depending on the difference between the output voltage and the reference voltage and on the first voltage signal. The comparison signal is compared with at least a threshold for generating a logic signal that switches between an active state and an inactive state and viceversa each time that the threshold is crossed, and the turn on or the turn off of the switch is controlled as a function of the state of the logic signal.
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Citations
19 Claims
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1. A method of regulating the supply voltage of a load by a switching voltage regulator having an inductor (L) driven by at least a power switch for delivering current to an output capacitor (COUT) with a certain parasitic series resistance (ESR) connected between an output node of the regulator and ground and to an electric load connected in parallel to the capacitor, comprising the steps of
establishing a reference voltage (V′ -
REF),
generating a comparison signal (VCOMP) as the sum of a first voltage signal (RSIL) proportional to the current circulating in the inductor (L) according to a certain proportionality coefficient (RS) and of a second voltage signal (VINT) function of the difference between the output voltage (VOUT) and said reference voltage (V′
REF) and of said first voltage signal,comparing said comparison signal (VCOMP) with at least a threshold for generating a logic signal that switches between an active state and an inactive state and viceversa each time that said threshold is crossed, commanding the turn on or the turn off of said power switch in function of the state of said logic signal, characterized in that said second voltage signal (VINT) is generated by integrating the sum between said first signal and the difference, multiplied by a certain quantity (α
), between the output voltage (VOUT) of the regulator and said reference voltage (V′
REF). - View Dependent Claims (2, 3)
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REF),
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4. A switching voltage regulator comprising an inductor (L) driven by at least a power switch for delivering current to an output capacitor (COUT) having a certain parasitic series resistance (ESR) connected between an output node and ground and to an electric load connected in parallel to the capacitor (COUT), a logic control circuit of said switch, circuit means for generating a voltage signal proportional to the current flowing in the inductor (L) according to a certain proportionality coefficient (RS), second circuit means (gm, R1, R2, C1, V′
-
REF) for generating an amplified and filtered error signal (V−
;
V+), and a comparator comparing said amplified and filtered error signal and said voltage signal proportional to the current in the inductor (L) and generating a logic signal applied to an input of the logic control circuit of said power switch,characterized in that said second circuit means comprise an integrator (gm, CINT, R1, R2) of the sum between said voltage signal and the difference, scaled of a certain quantity (α
), between the output voltage and a reference voltage (V′
REF). - View Dependent Claims (5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18)
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REF) for generating an amplified and filtered error signal (V−
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19. A method of defining a switching voltage regulator comprising an inductor (L) driven by at least a power switch for delivering current to an output capacitor (COUT) having a certain parasitic series resistance (ESR), connected between an output node and ground, and to an electrical load connected in parallel to the capacitor (COUT), a logic control circuit of said switch, circuit means capable of generating a voltage signal proportional to the current in the inductor (L) according to a certain proportionality coefficient (RS), second circuit means (gm, R1, R2, C1, V′
-
REF) capable of generating an amplified and filtered error signal (V−
;
V+), and a comparator input with a comparison signal (VCOMP) function (VCOMP=(VOUT−
V′
REF)·
B(s)+RSA(S)IL) of said amplified and filtered error signal and said voltage signal proportional to the current flowing in the inductor (L) for generating a logic signal applied to an input of said logic control circuit of said power switch, comprising the steps of;
establishing a maximum admissible variation speed (m) of the current flowing in said inductor, establishing a maximum admissible variation of the output current (Δ
IOUT,MAX),establishing a maximum admissible variation of the output voltage (Δ
VOUT,MAX),choosing the value of the output resistance (RO) of the regulator under steady state conditions alternatively between the value given by
Δ
VOUT,MAX/Δ
IOUT,MAX and the value of said parasitic series resistance (ESR),choosing the capacitance of the output capacitor (COUT) equal to or greater than the ratio Δ
IOUT,MAX/(m·
RO,fixing a certain reference voltage (V′
REF), with which to compare the output voltage (VOUT),determining complex proportionality functions, first (A(s)) and second (B(s)), of said comparison signal (VCOMP) with the current circulating in the inductor (IL) and the difference between said output voltage (VOUT) and said reference voltage (V′
REF), in function of a certain quantity (α
);
being
and said certain quantity (α
) being
-
REF) capable of generating an amplified and filtered error signal (V−
Specification