Communication system and method for sending and receiving data at a higher or lower sample rate than a network frame rate using a phase locked loop

• US 20040032922A1
• Filed: 08/14/2002
• Published: 02/19/2004
• Est. Priority Date: 08/14/2002
• Status: Active Grant

• Current Assignee: Standard Microsystems Corporation (Microchip Technology Incorporated)
• Original Assignee: Standard Microsystems Corporation (Microchip Technology Incorporated)
• Inventors: Knapp, David J., Maddox, John G., Akkihal, Shivanand I.
• Granted Patent: US 7,158,596 B2
• Time in Patent Office: Days
• US Class Current: 375/356
• CPC Class Codes: H04J 3/0647 Synchronisation among TDM nodes
• CPC Class Codes: H04L 7/0029 interpolation of received data signal

Abstract

A communication system, source and destination ports of the communication system, and methodology is provided for transporting data in one of possibly three different ways. Data is transported across the network at a frame sample rate that can be the same as or different from the sample rate or master clock within the source port or the destination port. If the sample rate of the source port is known, the sample rate of the destination port can be created using a PLL within the destination port and simply employing a phase comparator in the source port. The phase comparator forwards the phase or frequency difference of the network transfer rate and the source sample rate to the destination port, which then generates a local clock equivalent to the source which then compiles audio data being played at the same rate in which it was sampled at the source. Where economically feasible, sample rate conversion can be used at the source. However, sample rate conversion at the destination is preferred if the source sample rate is forwarded across the network relative to the frame transfer rate of the synchronous network. The sample rate converter simply produces a play rate from the transmitted information at the destination. Again, however, sample rate conversion compares relative phase difference changes similar to the phase difference compared in the digital PLL mode. As a further alternative, sample rates within the source and destination ports can be derived from the network frame rate using fractional dividers in the source and destination ports.

Claims

1. A source port of a communication network, comprising a comparator coupled to determine a phase difference between a transfer clock used to transfer data across the network and a sampling clock local to the source port.

2. The source port as recited in claim 1, wherein the transfer clock comprises a cycle equal in duration to a frame of data sent across the network.

3. The source port as recited in claim 1, wherein the transfer clock transitions at a frequency synchronous with a rate at which a plurality of frames are sent across the network.

4. The source port as recited in claim 1, wherein the sampling clock transitions at a rate substantially equal to the sample rate of streaming data sent from a multimedia device.

5. The source port as recited in claim 1, wherein the comparator is further coupled to forward the phase difference as a least one bit sent across the network.

6. The source port as recited in claim 5, wherein the at least one bit is sent regularly across the network.

7. The source port as recited in claim 1, wherein the comparator is coupled to compare a rising or falling edge of the transfer clock to a rising or falling edge of the sampling clock for each clock cycle of the transfer clock or the sampling clock.

8. The source port as recited in claim 1 is embodied upon a single, monolithic substrate.

9. A destination port of a communication network, comprising a phase-locked loop coupled to produce a clock local to the destination port that is locked in phase with a sampling clock local to a source port coupled to the destination port via the communication network.

10. The destination port as recited in claim 9, wherein the clocks local to the source port and the destination port are of the same frequency and dissimilar from a frequency by which each of a plurality of frames of data are sent across the network.

11. The destination port as recited in claim 9, wherein the clock local to the destination port is adapted to produce an analog output whose amplitude varies at each of the cycles of the sampling clock local to the destination port.

12. The destination port as recited in claim 9, wherein the sampling clock local to the source node transitions at a rate substantially equal to transitions of streaming data sent from a multimedia device

13. The destination port as recited in claim 9, wherein the phase-locked loop is coupled to receive a phase difference between the sampling clock local to the source port and a transfer clock used to transfer data across the network, and to subtract the phase difference with a phase difference between the clock local to the destination port and the transfer clock.

14. The destination port as recited in claim 13, further comprising an oscillator and a programmable divider that is responsive to the subtract result for producing the clock local to the destination port.

15. The destination port as recited in claim 14, wherein the clock local to the destination port transitions at a phase offset from the sampling clock local to the source port proportional to the subtract result.

16. The destination port as recited in claim 15, wherein the phase offset is substantially constant.

17. The destination port as recited in claim 15, wherein the phase offset is substantially constant even though the transfer clock is skewed across the network.

18. The destination port as recited in claim 9 is embodied upon a single, monolithic substrate.

19. A communication network, comprising:

a source port;

a destination port coupled to the source port by the network;

a plurality of frames of data, each of which are transferred across the network at a frame transfer rate;

a comparator coupled to produce a compare result of a phase difference between a transfer clock transitioning at the frame transfer rate and a sampling clock used to sample data at the source port; and

a phase-locked loop coupled to subtract the compare result with a phase difference between the transfer clock and a clock used to generate data at the destination port to lock the phases of the clocks at the source and destination ports.

20. The communication network as recited in claim 19, wherein the frame transfer rate transitions at a frequency synchronous within a transfer rate at which the plurality of frames are transferred across the network.

21. The communication network as recited in claim 19, wherein the source port comprises the comparator and the destination port comprises the phase-locked loop.

22. The communication network as recited in claim 19, wherein the compare result is sent across the network.

24. The method as recited in claim 21, wherein said re-creating comprises generating the clock local to the destination port that has a substantially constant phase relative to the sampling clock when the comparing yields equality.

25. The method as recited in claim 21, wherein said sending comprises forwarding the bit of information across the network from a source port to the destination port.

23. A method for generating a clock local to a destination port of a communication network, comprising:

sending at least one bit of information corresponding to a source phase difference between a phase of a sampling clock used to sample data at the source port and a phase of a frame transfer clock used to send data across the network;

receiving the bit of information;

comparing the source phase difference and a phase difference between a phase of a clock local to the destination port and the phase of the frame transfer clock; and

re-creating the clock local to the destination port having a phase offset relative to the sampling clock that is dependent on said comparing.