Method for fabricating a semiconductor component based on GaN

• US 20040033638A1
• Filed: 04/17/2003
• Published: 02/19/2004
• Est. Priority Date: 10/17/2000
• Status: Active Grant

• Current Assignee: OSRAM OLED GMBH (Ams-Osram AG)
• Original Assignee: OSRAM GmbH (Ams-Osram AG)
• Inventors: Harle, Volker, Hahn, Berthold, Eisert, Dominik, Bader, Stefan
• Granted Patent: US 7,691,656 B2
• Time in Patent Office: Days
• US Class Current: 438/46
• CPC Class Codes: H01L 27/153 in a repetitive configuration, e.g. LED bars
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/405 Reflective materials
• CPC Class Codes: H01L 33/44 characterised by the coatings, e.g. passivation layer or anti-reflective coating

Abstract

A semiconductor component has a plurality of GaN-based layers, which are preferably used to generate radiation, produced in a fabrication process. In the process, the plurality of GaN-based layers are applied to a composite substrate that includes a substrate body and an interlayer. A coefficient of thermal expansion of the substrate body is similar to or preferably greater than the coefficient of thermal expansion of the GaN-based layers, and the GaN-based layers are deposited on the interlayer. The interlayer and the substrate body are preferably joined by a wafer bonding process.

Claims

1. A method for an epitaxial fabrication of a semiconductor component, which comprises the steps of:

providing a composite substrate having a substrate body with a given coefficient of thermal expansion, and an interlayer; and

applying GaN-based layers to the interlayer of the composite substrate, the given coefficient of thermal expansion of the substrate body being equal to or greater than a coefficient of thermal expansion of the GaN-based layers.

2. The method according to claim 1, which further comprises setting a thickness of the interlayer such that a coefficient of thermal expansion of the composite substrate is substantially determined by the substrate body.

3. The method according to claim 1, which further comprises forming the substrate body from a material selected from the group consisting of SiC, poly-SiC, Si, poly-Si, sapphire, GaN, poly-GaN and AlN.

4. The method according to claim 1, which further comprises forming the interlayer from a material selected from the group consisting of SiC, Si, sapphire, MgO, GaN and AlGaN.

5. The method according to claim 1, which further comprises forming the interlayer with a monocrystalline surface at least in partial regions.

6. The method according to claim 1, which further comprises forming the substrate body from poly-SiC and the interlayer from monocrystalline SiC.

7. The method according to claim 1, which further comprises forming the substrate body from poly-Si and the interlayer from monocrystalline Si.

8. The method according to claim 1, which further comprises forming the substrate body from poly-GaN and the interlayer from monocrystalline GaN.

9. The method according to claim 1, which further comprises:

forming the interlayer with one of an Si(111) surface and an SiC surface which is monocrystalline at least in partial regions;

depositing the GaN-based layers on one of the Si(111) surface and the SiC surface.

10. The method according to claim 1, which further comprises applying the interlayer to the substrate body using a bonding process.

11. The method according to claim 1, which further comprises forming a bonding layer between the substrate body and the interlayer.

12. The method according to claim 11, which further comprises forming the bonding layer from silicon oxide.

13. The method according to claim 1, which further comprises forming a mask layer with epitaxy windows before the GaN-based layers are applied to the composite substrate, an epitaxy surface of the composite substrate within the epitaxy windows remaining uncovered.

14. The method according to claim 1, which further comprises patterning the GaN-based layers into individual semiconductor layer stacks after the GAN-based layers have been applied to the composite substrate.

15. The method according to claim 14, which further comprises:

applying a carrier to the semiconductor layer stacks; and

removing the composite substrate.

16. The method according to claim 14, which further comprises:

applying a temporary carrier to the semiconductor layer stacks;

removing the composite substrate;

applying a carrier to that side of the semiconductor layer stacks from which the composite substrate has been removed; and

removing the temporary carrier.

17. The method according to claim 15, which further comprises forming the carrier from a compound or element selected from the group consisting of GaAs, germanium, silicon, zinc oxide, molybdenum, aluminum, copper, iron, nickel, and cobalt.

18. The method according to claim 17, which further comprises forming the substrate body from sapphire and the carrier from a material selected from the group consisting of GaAs, molybdenum, tungsten, and an Fe—

Ni—

Co alloy.

19. The method according to claim 17, which further comprises forming the substrate body from SiC and the carrier from silicon or SiC.

20. The method according to claim 15, which further comprises matching a coefficient of thermal expansion of the carrier to the coefficient of thermal expansion of the GaN-based layers.

21. The method according to claim 15, which further comprises matching a coefficient of thermal expansion of the carrier to the given coefficient of thermal expansion of the substrate body.

22. The method according to claim 15, which further comprises forming the carrier to have a coefficient of thermal expansion to be between the given coefficient of thermal expansion of the substrate body and the coefficient of thermal expansion of the GaN-based layers.

23. The method according to claim 14, which further comprises forming a reflector layer on one of the GaN-based layers and the semiconductor layer stacks.

24. The method according to claim 23, which further comprises forming the reflector layer by applying a metal layer.

25. The method according to claim 24, which further comprises forming the metal layer from a material selected from the group consisting of silver, aluminum, silver alloy, and aluminum alloy.

26. The method according to claim 23, which further comprises simultaneously using the reflector layer as a contact surface.

27. The method according to claim 23, which further comprises forming the reflector layer from a dielectric mirror coating.

28. The method according to claim 14, which further comprises roughening a surface of the semiconductor layer stacks at least in regions.

29. The method according to claim 28, which further comprises etching a surface of the semiconductor layer stacks for roughening the semiconductor layer stacks.

30. The method according to claim 28, which further comprises roughening a surface of the semiconductor layer stacks by performing a sand-blasting process.

31. The method according to claim 1, which further comprises applying the interlayer to the substrate body using a bonding process selected from the group consisting of an oxidic bonding process and a wafer bonding process.

32. A thin-film semiconductor component selected from the group consisting of radiation-emitting components, diodes, transistors, radiation-emitting diodes, LEDs, semiconductor lasers and radiation-detecting components produced according to the method of claim 15.

33. A thin-film semiconductor component selected from the group consisting of radiation-emitting components, diodes, transistors, radiation-emitting diodes, LEDs, semiconductor lasers and radiation-detecting components produced according to the method of claim 16.

34. A method of using a composite substrate having a substrate body and an interlayer for an epitaxial fabrication of a semiconductor component having a plurality of GaN-based layers, which comprises the step of:

joining the substrate body to the interlayer using a bonding process.

35. The method according to claim 34, which further comprises joining the substrate body to the interlayer using one of an oxidic bonding process and a wafer bonding process.