Method and apparatus to prevent lateral oxidation in a transistor utilizing an ultra thin oxygen-diffusion barrier

• US 20040033678A1
• Filed: 03/25/2003
• Published: 02/19/2004
• Est. Priority Date: 08/14/2002
• Status: Abandoned Application

• Current Assignee: Patricia Stokley, Reza Arghavani, Robert Chau
• Original Assignee: Patricia Stokley, Reza Arghavani, Robert Chau
• Inventors: Arghavani, Reza, Chau, Robert, Stokley, Patricia
• Application Number:
  US10/397,776
• Publication Number:
  US 20040033678A1
• Time in Patent Office: Days
• US Class Current: 438/510
• CPC Class Codes: H01L 21/28176 with a treatment, e.g. annealing, after the formation of the definitive gate conductor
• CPC Class Codes: H01L 21/28194 by deposition, e.g. evaporation, ALD, CVD, sputtering, laser deposition H01L21/28202 takes precedence
• CPC Class Codes: H01L 21/28247 passivation or protection of the electrode, e.g. using re-oxidation
• CPC Class Codes: H01L 29/4983 with a lateral structure, e.g. a Polysilicon gate with a lateral doping variation or with a lateral composition variation or characterised by the sidewalls being composed of conductive, resistive or dielectric material
• CPC Class Codes: H01L 29/517 the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate H01L29/518 takes precedence
• CPC Class Codes: H01L 29/6656 using multiple spacer layers, e.g. multiple sidewall spacers
• CPC Class Codes: H01L 29/6659 with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
• CPC Class Codes: H01L 29/7833 with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's for thin film transistors H01L29/78618

Abstract

A method and apparatus of preventing lateral oxidation through gate dielectrics that are highly permeable to oxygen diffusion, such as high-k gate dielectrics. According to one embodiment of the invention, a gate structure is formed on a substrate, the gate structure having an oxygen-permeable gate dielectric. An oxygen diffusion barrier is then formed on the sidewalls of the gate structure to prevent oxygen from diffusing laterally into the oxygen-permeable gate dielectric, thus preventing oxidation to the substrate underneath the gate dielectric or to the electrically conductive gate electrode overlying the gate dielectric.

Claims

1. A method, comprising:

forming a gate structure on a silicon substrate, the gate structure comprising an electrically conductive gate electrode on an oxygen-permeable gate dielectric, the gate structure having sidewalls; and

forming a thin oxygen-diffusion barrier on an entire sidewall length of the gate structure, the thin oxygen-diffusion barrier to prevent oxygen from diffusing laterally into the oxygen-permeable gate dielectric.

2. The method of claim 1, further comprising forming shallow source/drain extensions in the silicon substrate adjacent to the gate structure immediately after forming the thin oxygen-diffusion barrier.

3. The method of claim 1, wherein the oxygen-permeable dielectric layer is a high-k dielectric material.

4. The method of claim 1, wherein the thin oxygen-resistant layer is formed to a thickness between approximately 2 Å

to 300 Å

.

5. The method of claim 1, wherein the thin oxygen-resistant layer does not contain diffusible oxygen.

6. The method of claim 1, wherein the thin oxygen-resistant layer is a nitride.

7. The method of claim 1, wherein the thin oxygen-resistant layer is formed via a low-temperature process.

8. The method of claim 1, wherein the thin oxygen-resistant layer is formed via a BTBAS process.

9. The method of claim 1, further including performing the method in a substantially oxygen-free environment.

10. A method comprising

depositing a high-k dielectric layer on a substrate, the high-k dielectric layer being highly permeable to oxygen diffusion;

depositing an electrically conductive layer on the high-k dielectric layer;

patterning the electrically conductive layer and high-k dielectric layer to form a gate structure on the substrate, the gate structure having an electrically conductive gate electrode and a high-k gate dielectric, the electrically conductive gate electrode and high-k gate dielectric having vertically aligned sidewalls;

blanket depositing a thin oxygen-resistant layer over the gate structure and on the vertically aligned sidewalls of the electrically conductive gate electrode and high-k gate dielectric, the thin oxygen-resistant layer deposited to a thickness between approximately 2 Å

to 300 Å

; and

anisotropically etching the thin oxygen-resistant layer to form a thin oxygen-diffusion barrier layer on the vertically aligned sidewalls of the gate electrode and the high-k gate dielectric.

11. The method of claim 10, wherein the electrically conductive layer comprises polysilicon.

12. The method of claim 10, wherein the thin oxygen-resistant insulating layer comprises nitride.

13. The method of claim 10, wherein the thin oxygen-resistant layer is deposited utilizing a low-temperature process.

14. The method of claim 10, wherein the thin oxygen-resistant layer is deposited at a temperature of less than 650°

C.

15. The method of claim 10, wherein the thin oxygen-resistant layer is free from diffusible oxygen.

16. An apparatus, comprising:

an oxygen-permeable gate dielectric overlying a substrate;

an electrically conductive gate electrode over the oxygen-permeable gate dielectric; and

a thin oxygen-diffusion barrier covering the entire sidewall length of the gate dielectric, the thin oxygen diffusion barrier to prevent oxygen from diffusing laterally into the gate dielectric.

17. The apparatus of claim 16, wherein the gate dielectric is a high-k dielectric material.

18. The apparatus of claim 16, wherein the electrically conductive structure is polysilicon.

19. The apparatus of claim 16, wherein the thin oxygen-diffusion barrier has a thickness between approximately 2 Å

to 300 Å

.

20. The apparatus of claim 16, wherein the thin oxygen-diffusion barrier comprises a nitride material.

21. The apparatus of claim 16, wherein the thin oxygen-diffusion barrier is free from diffusible oxygen.

22. An integrated circuit, comprising:

a silicon substrate;

a high-k gate dielectric overlying the silicon substrate, the high-k gate dielectric having sidewalls;

an electrically conductive gate electrode overlying the high-k gate dielectric; and

a thin oxygen-diffusion barrier covering the entire sidewall length of the high-k gate dielectric, the thin oxygen-diffusion barrier to prevent oxygen from diffusing laterally into the gate dielectric.

23. The integrated circuit of claim 22, further comprising thick spacers adjacent to the thin oxygen-diffusion barrier.

24. The integrated circuit of claim 22, wherein the thin oxygen-diffusion barrier comprises a nitride material.

25. The integrated circuit of claim 22, wherein the thin oxygen-diffusion barrier are free from diffusible oxygen.

26. The integrated circuit of claim 22, wherein the high-k gate dielectric has a dielectric constant substantially higher than that of silicon dioxide.

27. The integrated circuit of claim 22, wherein the high-k gate dielectric comprises a material from the group consisting of metal oxides, ferroelectrics, amorphous metal silicates and silicate oxides, and paralectrics.