PCMIA interface card for coupling input devices such as barcode scanning engines to personal digital assistants and palmtop computers

• US 20040041029A1
• Filed: 02/11/2003
• Published: 03/04/2004
• Est. Priority Date: 04/29/1994
• Status: Active Grant

• Current Assignee: Datalogic Mobile Incorporated (Datalogic S.p.A.), Datalogic Scanning Incorporated (Datalogic S.p.A.), TPS Electronics
• Original Assignee: PSC Scanning, Inc. (Datalogic ADC Incorporated)
• Inventors: Postman, Joel R., Fish, Ronald C., Miller, George B.
• Granted Patent: US 6,923,377 B2
• Time in Patent Office: Days
• US Class Current: 235/462.3
• CPC Class Codes: G01D 2213/10 Drivers for gauges
• CPC Class Codes: G06F 1/1626 with a single-body enclosure integrating a flat display, e.g. Personal Digital Assistants [PDAs]
• CPC Class Codes: G06F 1/1632 External expansion units, e.g. docking stations
• CPC Class Codes: G06F 3/00 Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
• CPC Class Codes: G06F 3/002 Specific input/output arrangements not covered by G06F3/01 - G06F3/16 other optical apparatus G02B27/00
• CPC Class Codes: G06F 3/023 Arrangements for converting discrete items of information into a coded form, e.g. arrangements for interpreting keyboard generated codes as alphanumeric codes, operand codes or instruction codes
• CPC Class Codes: G06F 3/038 Control and interface arrangements therefor, e.g. drivers or device-embedded control circuitry
• CPC Class Codes: G06F 3/0383 Signal control means within the pointing device

Abstract

A variety of PC card interfaces to interface from many different types of input devices to Personal Digital Assistants or palmtop computers through PCMCIA slots. The disclosed interfaces can receive data in undecoded format from laser based, wand based or CCD based barcode scanning engines, decode the data to alphanumeric characters and pass the decoded data to the PDA via the PCMCIA 68 pin bus. Other PC card based interfaces are also disclosed which can accept input data in the form of ASCII or EBCDIC characters from virtually any type of input device which a standard serial or parallel output or custom output bus and input that data to the PDA through the PCMCIA bus. Some embodiments use programmed general purpose microprocessors to decode undecoded barcode scan data on the PC card. Other embodiments use custom-programmed, commercially available barcode decoding chips to decode incoming undecoded barcode scan data. Some embodiments of PC card interfaces sample undecoded barcode scan signals and pass the samples to the host through the PCMCIA bus for decoding by a suitably programmed host computer.

Claims

1. An interface circuit in the form factor of a PCMCIA defined PC card, said interface circuit for coupling between an input device that can generate electrical signals encoding alphanumeric characters and a host computer with a PCMCIA slot housing a PCMCIA bus connector, comprising:

an input port for receiving said electrical signals from said input device;

a PCMCIA bus connector;

a decoder circuit coupled to said input port so as to receive said electrical signals, said decoder circuit for decoding said electrical signals to generate one or more alphanumeric characters and for notifying said host computer when at least one successful decoding operation has occurred and at least one alphanumeric character resulting from decoding operations is available on said PC card for access by said host computer; and

an interface circuit coupled to said decoder circuit and to said PCMCIA bus connector on said PC card, for facilitating coupling of said decoder circuit to said host computer via said PCMCIA bus connectors such that said notification of a successful decoding operation can be passed to said host computer via said PCMCIA bus connectors and so that said host computer can retrieve said one or more decoded alphanumeric characters from said PC card via said bus connectors.

2. The apparatus of claim 1 wherein said input device is physically mounted on said PC card.

3. The apparatus of claim 2 further comprising nonvolatile memory physically mounted on said PC card and coupled to said host computer through said PCMCIA bus connector for access by said host computer and or said decoder circuit.

4. The apparatus of claim 3 wherein said decoder circuit is of the class of commercially available barcode decoding integrated circuits of which is typical the integrated circuit manufactured by Hewlett Packard and marketed under the model designation HP 2312 as of the time of filing of this patent application.

5. The apparatus of claim 4 wherein said interface circuit is of the class of commercially available PCMCIA interface adapter integrated circuits of which is typical the integrated circuit manufactured by Zilog under the model designation Z86017 as of the time of filing of this patent application.

6. The apparatus of claim 2 wherein said interface circuit is of the class of commercially available PCMCIA interface adapter integrated circuits of which is typical the integrated circuit manufactured by Zilog under the model designation Z86017 as of the time of filing of this patent application, and wherein said input device is a barcode scan engine which is physically mounted on said PC card.

7. The apparatus of claim 1 wherein said PC card further comprises nonvolatile memory coupled for access by said host computer through said PCMCIA bus connector.

8. An interface circuit in the form factor of a PCMCIA defined PC card, said interface circuit for coupling between an input device that can generate electrical signals encoding alphanumeric characters and a host computer with a PCMCIA slot housing a PCMCIA bus connector, comprising:

nonvolatile memory for access by said host computer;

an input interface circuit for receiving electrical signals from said input device in whatever form they are sent and converting them to a useable form;

a PCMCIA bus connector;

a decoder circuit coupled to said input interface circuit so as to receive said electrical signals after conversion to a form useable by said decoder circuit, said decoder circuit for decoding said electrical signals to generate one or more alphanumeric characters encoded in said electrical signals and for notifying said host computer when at least one successful decoding operation has occurred and at least one alphanumeric character resulting from decoding operations is available on said PC card for access by said host computer; and

an interface circuit coupled to said decoder circuit and to said PCMCIA bus connector on said PC card, for facilitating coupling of said decoder circuit to said host computer via said PCMCIA bus connectors such that said notification of a successful decoding operation can be passed to said host computer via said PCMCIA bus connectors in the form of an interrupt and so that said host computer can retrieve said one or more decoded alphanumeric characters from said PC card via said PCMCIA bus connectors.

9. The apparatus of claim 8 wherein said decoder circuit is of the class of commercially available barcode decoding integrated circuits of which is typical the integrated circuit manufactured by Hewlett Packard and marketed under the model designation HP 2312 as of the time of filing of this patent application

10. The apparatus of claim 8 wherein said PC card has an I/O mode and a memory mode, and wherein said PCMCIA bus connector has data bus pins comprising high byte data pins and low byte data pins, address pins and a plurality of pins carrying a first plurality of control signals in I/O mode and a second plurality of signals in memory mode, at least one of said control signals being an interrupt, and wherein said nonvolatile memory is comprised of a high byte flash memory for storing the high byte of every stored word and a low byte flash memory for storing the low byte of information of every stored word, and wherein each of said high byte and low byte flash memories has an address port coupled to said address pins of said PCMCIA bus connector and has a data port, said interface circuit comprising:

a bidirectional high byte steering buffer having a first data port coupled to the high byte data pins of said PCMCIA data bus, and having a second data port coupled to said data port of said high byte flash memory, and having a chip select input;

a bidirectional low byte steering buffer having a first data port coupled to the low byte data pins of said PCMCIA data bus, and having a second data port coupled to said data port of said high byte flash memory, and having a chip select input;

a card information nonvolatile memory for storing data comprising the Card Information Structure, and having a data port coupled to said low byte data pins of said PCMCIA bus, and having a chip select input;

a configuration option register for storing data sent by the host computer controlling whether said PC card is in memory mode or I/O mode, and having a data port coupled to said low byte data pins of said PCMCIA bus, and having a chip select input;

a card status register for storing data sent by the host computer which controls whether interrupts can be generated and controlling whether the PC card sends an audio feedback signal generated by said decoder to said host computer, and having a data port coupled to said low byte data pins of said PCMCIA bus, and having a chip select input;

a pin replace register for storing the states of predetermined control signals in memory mode which are carried on shared pins of the PCMCIA bus that are used for other control signals in I/O mode, and having a data port coupled to said low byte data pins of said PCMCIA bus, and having a chip select input;

a control register for storing pacing signals involved in the handshaking protocol for data transfers between said PC card and said host computer, and having a data port coupled to said low byte data pins of said PCMCIA bus, and coupled to said decoder such that said decoder can read said pacing signals, and having a chip select input;

a status register coupled to said decoder for storing predetermined pacing signals generated by said decoder and involved in said handshaking protocol for data transfers between said PC card and said host computer, and having a data port coupled to said low byte data pins of said PCMCIA bus, and having a chip select input;

a command register coupled to said decoder by a multiplexed data/address bus, and having a data port coupled to said low byte data pins of said PCMCIA bus, and having a chip select input, for storing ASCII character strings sent by said host computer to said PC card to control operations by said decoder;

a data register coupled to said decoder by a multiplexed data/address bus, and having a data port coupled to said low byte data pins of said PCMCIA bus, and having a chip select input, for storing alphanumeric characters decoded by said decoder temporarily until said alphanumeric character is sent to said host computer;

a static random access memory having an address port having a plurality of pins some of which are coupled to address output pins of said decoder, and having a data port coupled to said decoder via said multiplexed data/address bus;

an address latch coupled to said decoder by a multiplexed data/address bus, for storing address data sent by said decoder, and having an address output port coupled to the address pins of said address port of said static random access memory which are not coupled to said decoder;

a control and interrupt logic circuit coupled to said interrupt control signal pin of said PCMCIA bus connector on said PC card, and coupled to said chip select inputs of said card info nonvolatile memory, said high byte flash memory, said low byte flash memory, said configuration option register, said card status register, said pin replace register, said control register, said status register, said command register and said data register, and coupled to receive predetermined control and address signals from said PCMCIA bus pins on the PCMCIA bus connector and to receive predetermined control signals generated on said PC card, for activating predetermined chip select signals based upon predetermined combinations of logic states of said control and address signals, and for activating said interrupt signal to said host computer based upon predetermined combinations of logic states of said control and address signals.

11. The apparatus of claim 9 further comprising a headphone interface circuit coupled to said decoder circuit for driving headphones using a digital audio signal generated by said decoder circuit.

12. The apparatus of claim 9 further comprising a motion sensor coupled to said interface circuit for generating a signal which indicates when motion is sensed in front of said motion sensor, and wherein said interface circuit includes circuitry for coupling said motion sensor circuit to a barcode client application controlling execution by said host computer such that said barcode client application can send a signal to said decoder circuit to cause said input device to start operating.

13. The apparatus of claim 9 further comprising a conventional trigger switch coupled to said interface circuit for generating a signal which indicates when operation by said input device is desired, and wherein said interface circuit includes circuitry for coupling said motion sensor circuit to a barcode client application controlling execution by said host computer such that said barcode client application can send a signal to said decoder circuit to cause said input device to start operating.

14. The apparatus of claim 9 further comprising a motion sensor coupled to said interface circuit for generating a signal which indicates when motion is sensed in front of said motion sensor, and wherein said interface circuit includes circuitry for coupling said signal output by said motion sensor circuit to said decoder circuit to cause said decoder circuit to generate a signal to cause said input device to start operating.

15. The apparatus of claim 9 further comprising a conventional hand operated trigger switch coupled to said interface circuit for generating a signal which indicates when operation by said input device is desired, and wherein said interface circuit includes circuitry for coupling said signal output by said motion sensor circuit to said decoder circuit to cause said decoder circuit to generate a signal to cause said input device to start operating.

16. An interface circuit in the form factor of a PCMCIA defined PC card, said interface circuit for coupling between an input device that can generate electrical signals encoding the spatial patterns of contrasting areas of an image or representing some other type of code which encodes alphanumeric information and a host computer with a PCMCIA slot housing a PCMCIA bus connector, comprising:

an input port for receiving electrical signals from said input device;

a PCMCIA bus connector;

decoder means coupled to said input port so as to receive said electrical signals, for decoding said electrical signals to generate one or more alphanumeric characters encoded in said electrical signals and for notifying said host computer when at least one successful decoding operation has occurred and at least one alphanumeric character resulting from decoding operations is available on said PC card for access by said host computer; and

PCMCIA interface means coupled to said decoder circuit and to said PCMCIA bus connector on said PC card, for coupling said decoder circuit to said host computer via said PCMCIA bus connectors such that said notification of a successful decoding operation can be passed to said host computer via said PCMCIA bus connectors and so that said host computer can retrieve said one or more decoded alphanumeric characters from said PC card via said PCMCIA bus connectors.

17. The apparatus of claim 16 wherein said input device is a barcode scan engine and further comprising said barcode scan engine physically attached to said PC card and coupled to supply to said input port electrical signals encoding the contrasting patterns of a barcode therein.

18. The apparatus of claim 17 further comprising nonvolatile memory on said PC card for access by said host computer, and wherein said PC card can operate in I/O mode or memory mode and wherein said PCMCIA interface means includes means for providing access by said host computer both to said alphanumeric characters generated by said decoder means and data stored in said nonvolatile memory, access to said alphanumeric characters generated by said decoder being via I/O mode transactions and access to data stored in said nonvolatile memory via memory mode transactions.

19. The apparatus of claim 16 wherein said PC card includes one or more registers for storing control data generated by said host computer and transmitted to said PC card and control data generated by said PC card and for storing alphanumeric characters generated by said decoder means, said one or more registers mapped into the attribute space and I/O space of said PC card'"'"'s memory mapping, and wherein said PCMCIA interface means includes means controlling operations by said host computer to determine the base address in said PC card'"'"'s memory mapping where one or more of said registers on said PC card can be found each time the PC card form factor interface to a barcode scan engine is inserted into the PCMCIA slot of the host computer, and wherein said PCMCIA interface means includes means for generating an interrupt signal to said host computer when at least one successful decoding operation has occurred and at least one alphanumeric character is waiting to be read by said host computer, and wherein said PCMCIA interface means includes means controlling execution by said host computer to determine the interrupt number assigned by the host computer to the interrupt from the PC card form factor interface to a barcode scan engine is inserted into the PCMCIA slot of the host computer.

20. An interface circuit in the form factor of a PCMCIA defined PC card, said interface circuit for coupling between a barcode scan engine that can generate electrical signals encoding the spatial patterns of contrasting areas of a barcode and a host computer with a PCMCIA slot housing a PCMCIA bus connector, comprising:

a nonvolatile memory on said PC card for access by said host computer, and wherein said PC card can operate in I/O mode or memory mode;

a barcode scan engine physically attached to said PC card and coupled to supply to said input port electrical signals encoding the contrasting patterns of a barcode therein;

an input port for receiving electrical signals from said barcode scan engine resulting from scanning of a barcode;

a PCMCIA bus connector;

decoder means coupled to said input port so as to receive said electrical signals, for decoding said electrical signals to generate one or more alphanumeric characters encoded in the spatial patterns of said barcode and for notifying said host computer when at least one successful decoding operation has occurred and at least one alphanumeric character resulting from decoding operations is available on said PC card for access by said host computer; and

PCMCIA interface means coupled to said decoder circuit and to said PCMCIA bus connector on said PC card, for coupling said decoder circuit to said host computer via said PCMCIA bus connectors such that said notification of a successful decoding operation can be passed to said host computer via said PCMCIA bus connectors and so that said host computer can retrieve said one or more decoded alphanumeric characters from said PC card via said PCMCIA bus connectors, and wherein said, PCMCIA interface means includes means for providing access by said host computer both to said alphanumeric characters generated by said decoder means and data stored in said nonvolatile memory, access to said alphanumeric characters generated by said decoder being via I/O mode transactions and access to data stored in said nonvolatile memory via memory mode transactions.

21. The apparatus of claim 20 wherein said PC card includes one or more registers for storing control data generated by said host computer and transmitted to said PC card and control data generated by said PC card and for storing alphanumeric characters generated by said decoder means, said one or more registers mapped into the attribute space and I/O space of said PC card'"'"'s memory mapping, and wherein said PCMCIA interface means includes means controlling operations by said host computer to determine the base address in said PC card'"'"'s memory mapping where one or more of said registers on said PC card can be found each time the PC card form factor interface to a barcode scan engine is inserted into the PCMCIA slot of the host computer, and wherein said PCMCIA interface means includes means for generating an interrupt signal to said host computer when at least one successful decoding operation has occurred and at least one alphanumeric character is waiting to be read by said host computer, and wherein said PCMCIA interface means includes means controlling execution by said host computer to determine the interrupt number assigned by the host computer to the interrupt from the PC card form factor interface to a barcode scan engine is inserted into the PCMCIA slot of the host computer.

22. An interface circuit in the form factor of a PCMCIA defined PC card, said interface circuit for coupling between an input device that can generate electrical signals encoding alphanumeric characters and a host computer having a PCMCIA slot housing a PCMCIA bus connector, comprising:

an input port for receiving electrical signals from said input device that can generate electrical signals encoding the spatial patterns of said image;

a PCMCIA bus connector for coupling to said PCMCIA bus connector of said host computer;

a PCMCIA interface adapter circuit coupled to receive said electrical signal from said input port, for converting said electrical signals into a plurality of digital sample values representing the amplitude of said electrical signals at various times and for coupling said sample values to said host computer through said PCMCIA bus connectors, said digital sample values for decoding into alphanumeric characters by said host computer.

23. The apparatus of claim 22 further comprising auxiliary nonvolatile memory on said PC card which said host computer can access to read data or write data via said PCMCIA bus connectors.

24. The apparatus of claim 22 further comprising decode means within said host computer for controlling said microprocessor to convert said digital samples into the alphanumeric characters encoded within the spatial patterns of said barcode.

25. The apparatus of claim 23 further comprising decode means within said host computer for controlling said microprocessor to convert said digital samples into the alphanumeric characters encoded within the spatial patterns of said barcode.

26. A process for decoding on a PC card alphanumeric characters from electrical signals generated by an input device encoding alphanumeric characters which are received by said PC card, comprising:

receiving a signal that operation by said input device is desired;

sending a signal to said input device to cause operation of said input device to start generation of said electrical signals; and

decoding said electrical signals into alphanumeric characters on said PC card.

27. The process of claim 26 further comprising generating an interrupt to a host computer each time a successful decoding operation has occurred, and controlling said host computer to retrieve said alphanumeric character from said PC card in response to said interrupt.

28. The process of claim 27 wherein said input device is a barcode scan engine, and wherein said step of receiving a signal that operation by said input device is desired comprises the step of receiving a signal from either a motion sensor or a manual switch, and wherein said step of sending a signal to said input device comprises sending a signal to said barcode scan engine to cause scanning to start.

29. The process of claim 28 wherein said decoding step comprises:

forming a binary image of the contrasting areas of the barcode image to be decoded;

calculating the ratios of run lengths of logic 1'"'"'s to logic 0'"'"'s;

analyzing the ratios of run lengths to find start and stop characters;

analyzing said start and stop characters to determine in which direction said barcode was scanned and what type of barcode was scanned;

decode the alphanumeric characters encoded in the ratios of run lengths;

determine if the decoding was successful; and

generate a signal indicating decoding was successful.

30. The process of claim 29 wherein the step of determining if the decoding was successful includes the step of checking a checksum result calculated from the decoded result against a checksum encoded in said barcode, wherein said step of generating a signal indicating decoding was successful includes the steps of sending the signal to said host computer for generation of an audible or visible indication of a successful decoding.

31. The process of claim 29 further comprising the steps of filtering out any unwanted parts of the decoded result and/or adding any desired prefix or suffix to the decoded result.

32. The process of claim 26 further comprising the step of holding said alphanumeric character in a memory on said PC card until said memory is read as part of a polling operation by said host computer.

33. The process of claim 26 further comprising the step of continuing to decode alphanumeric characters from electrical signals generated by said input device until no more activity by said electrical signals is occurring, and then generating an interrupt to said host computer, and controlling said host computer to retrieve all said alphanumeric characters stored on said PC card in response to said interrupt.

34. The process of claim 33 further comprising the step of holding said alphanumeric character in a memory on said PC card until said memory is read as part of a polling operation by said host computer.

35. A process for controlling a host computer to determine the base address for one or more registers mapped into the I/O space of a PCMCIA PC card and for determining the interrupt number of said PC card, comprising the steps of:

controlling said host computer with card services, memory technology driver and socket services software routines so as to provide to barcode client applications with an interface for performing transactions with said PC card;

controlling said host computer to execute a barcode client application and register said barcode client application with a card services software layer as a client;

controlling said host computer using said card services software routine to assign an interrupt number to a PC card when a new PC card is inserted into a PCMCIA slot of said host computer, and to assign a base address in the I/O space of said PC card to one or more registers or memories on said PC card;

controlling said host computer using said memory technology driver software routine to retrieve from the card services layer and store the interrupt number and base address of the PC card assigned by said card services layer;

controlling said host computer using said barcode client application to interrogate said card services layer to obtain data regarding the first registered client in a list of clients registered with said card services routine and controlling said host computer using said barcode client application to pass to said card services routine a get client information command having a predetermined argument;

controlling said host computer using said card services routine to pass said get client information command and said predetermined argument to said first registered client;

controlling said host computer using said memory technology driver routine if said PC card is the first registered client so as to respond to the get client information command by generating a message having unique identification data at a first predetermined offset from the beginning of said message and having the interrupt number and the base address of the PC card at a second predetermined offset from the start of the message and to send said message to said card services routine;

controlling said host computer using said card services routine to receive a message returned from said first registered client in response to said get client information call and pass the returned message to said barcode client routine;

controlling said host computer using said barcode client software routine to examine the returned message from the first registered client to determine if the message contains unique signature data indicating said first register client is said PC card;

if the first registered client is not said PC card, repeating the above described process of interrogating the card services layer to determine the next registered client on the list of registered clients and sending a get client information command with said predetermined argument to said next registered client and examining the returned message to determine if the next registered client is the PC card and repeating this process of all registered clients until the PC card client is found;

after the PC card client is found, reading said interrupt and said base address from said second predetermined offset location in said message returned from said memory technology driver routine;

controlling said computer using said barcode client application to pass the interrupt number to an operating system of said host computer for storage in an interrupt vector table;

when an interrupt is received from said PC card, controlling said computer using said barcode client application and using said base address to control addressing in an I/O transaction carried out by said barcode client application with said PC card to retrieve data from said PC card.