Apparatus for programming a programmable device, and method

• US 20040041175A1
• Filed: 08/29/2002
• Published: 03/04/2004
• Est. Priority Date: 08/29/2002
• Status: Active Grant

• Current Assignee: F Poszat Hu LLC (Intellectual Ventures LLC)
• Original Assignee: Anadigm Limited
• Inventors: MacBeth, Ian Craig, Anderson, Howard C., Bersch, Danny Austin, Streit, Timothy James, Schene, Christopher Robin
• Granted Patent: US 6,978,435 B2
• Time in Patent Office: Days
• US Class Current: 257/202
• CPC Class Codes: G06F 30/34 for reconfigurable circuits, e.g. field programmable gate arrays [FPGA] or programmable logic devices [PLD]
• CPC Class Codes: G06F 30/343 Logical level
• CPC Class Codes: G06F 30/36 Circuit design at the analogue level

Abstract

An apparatus is provided for programming a programmable circuit device capable of realizing at least one sub-circuit by wiring together at least one circuit component. The programmable circuit device includes a programmable computing device, a user interface, and a design tool. The user interface is associated with the programmable computing device. The design tool is associated with the programmable computing device and is configured for interaction with a user at the user interface. The design tool includes computer program code embodied in the programmable computing device including a sub-circuit definition containing information for defining at least one of multiple configurations, topologies, and parameters of a sub-circuit of a programmable device. A method is also provided.

Claims

1. An apparatus for programming a programmable circuit device capable of realizing at least one sub-circuit by wiring together at least one circuit component, comprising:

a programmable computing device;

a user interface associated with the programmable computing device; and

a design tool associated with the programmable computing device and configured for interaction with a user at the user interface, the design tool comprising computer program code embodied in the programmable computing device including a sub-circuit definition containing information for defining at least one of multiple configurations, topologies, and parameters of a sub-circuit of a programmable device.

2. The apparatus of claim 1 wherein the sub-circuit definition includes information in the form of one or more algorithms.

3. The apparatus of claim 2 wherein the information is realized at least in part in interpreter code.

4. The apparatus of claim 2 wherein the information is combined with data stored in the design tool and data received via the user interface.

5. The apparatus of claim 1 wherein the sub-circuit definition includes information about sub-circuit topology.

6. The apparatus of claim 1 wherein the sub-circuit definition includes information about the sub-circuit usable to map a relationship of sub-circuit topology and component values to higher level parameters displayed by the user interface.

7. The apparatus of claim 1 wherein the sub-circuit definition includes information about performance of the sub-circuit as identified through simulation.

8. The apparatus of claim 1 wherein the configurable hardware device comprises a field programmable analog array (FPAA).

9. The apparatus of claim 1 wherein the sub-circuit definition includes information for defining and controlling the user interface to enable control of multiple configurations for a sub-circuit of the programmable device.

10. The apparatus of claim 1 wherein the sub-circuit definition includes information for modify the configuration of a sub-circuit of the programmable device.

11. The apparatus of claim 1 wherein the sub-circuit definition includes information derived from user selections implemented at the user interface.

12. The apparatus of claim 1 wherein the sub-circuit definition includes information usable to provide error checking relating to the correct use of the sub-circuit.

13. The apparatus of claim 1 wherein the sub-circuit definition includes information usable to simulate behavior of the sub-circuit when placed within a larger analog circuit.

14. The apparatus of claim 1 wherein the sub-circuit definition includes information usable to draw a symbolic representation of the sub-circuit.

15. The apparatus of claim 1 wherein the sub-circuit definition includes information usable to determine a version number of the sub-circuit.

16. The apparatus of claim 14 wherein the sub-circuit definition includes information usable to determine compatibility of the sub-circuit with a particular design tool or version of the design tool.

17. The apparatus of claim 13 wherein the sub-circuit definition includes information usable to determine compatibility of the sub-circuit with a programmable device.

18. The apparatus of claim 1 wherein the algorithms comprise code routines.

19. The apparatus of claim 18 wherein the wherein the code routines comprise “

C”

language code.

20. An apparatus for programming a programmable device, comprising:

a programmable computer;

a user interface associated with the programmable computer; and

computer program code embodied in the programmable computer including at least one sub-circuit definition comprising information about a sub-circuit of a programmable device usable to define multiple values for at least one parameter of the sub-circuit responsive to user input at the user interface for wiring together circuit components to realize a sub-circuit in the programmable device.

21. The system of claim 20 wherein the information is usable to define multiple configurations of the sub-circuit.

22. The system of claim 20 wherein the information is usable to define multiple topologies of the sub-circuit.

23. The system of claim 20 wherein the information is usable to control the user interface to enable selective configuration of the sub-circuit from amongst multiple configurations.

24. The system of claim 20 wherein the user interface enables user selection of the information usable to modify configuration of the sub-circuit.

25. The system of claim 20 wherein the sub-circuit definition comprises a plurality of netlists.

26. The system of claim 25 wherein the netlist includes references to analog components that exist on a programmable device being designed.

27. The system of claim 26 wherein the programmable device being designed comprises a field programmable analog array (FPAA).

28. The system of claim 26 wherein the netlist comprises connectivity information detailing how to connect circuit components to realize a user-selected configuration of a sub-circuit.

29. The system of claim 20 wherein the sub-circuit definition comprises a single text file including information defining a particular sub-circuit.

30. The system of claim 29 wherein the particular sub-circuit comprises a halfcycle gain stage.

31. A method of programming a programmable circuit device, comprising:

providing a programmable computer with a design tool and sub-circuit definitions for circuit components; and

with the programmable computer, generating a circuit design that wires together circuit components to realize a sub-circuit within a programmable circuit device.

32. The method of claim 31 wherein generating a circuit design comprises reading data contained within a particular sub-circuit definition.

33. The method of claim 31 further comprising providing a user interface, and wherein generating a circuit design comprises assembling at least one sub-circuit design into a larger circuit design.

34. The method of claim 31 further comprising providing a user interface for each sub-circuit definition usable to design a particular sub-circuit, and wherein generating a circuit design comprises configuring a sub-circuit design via the user interface.

35. The method of claim 31 wherein the sub-circuit definition includes interpreter code, and wherein generating a circuit design comprises running the interpreter code.

36. The method of claim 31 further comprising providing a user interface communicating with the design tool, and enabling the user interface with functionality specific to a particular programmable device.

37. The method of claim 31 wherein the design tool is configured by a user to set up and run a simulation using a circuit design and information contained in the sub-circuit definitions.

38. The method of claim 31 further comprising viewing results of a circuit simulation for the circuit design using the design tool.

39. The method of claim 31 further comprising transforming the circuit design into data properly formatted to download into a programmable device.

40. The method of claim 39 further comprising facilitating download of the properly formatted data into the programmable device.

41. An apparatus for programming a programmable device having circuit components capable of being configured into a circuit, comprising:

a programmable computer; and

computer program code embodied in the programmable computer including at least one sub-circuit definition comprising information for wiring together sub-circuit components of a programmable device into a circuit design and usable to define unique multiple configurations of the sub-circuit.

42. The apparatus of claim 41 wherein the sub-circuit definition comprises a plurality of netlists.

43. The apparatus of claim 41 wherein a selected netlist comprises references to circuit components that exist on the programmable device.

44. The apparatus of claim 41 wherein the sub-circuit definition comprises information that enables a user to set parameters for a sub-circuit design.

45. A method of configuring together circuit components to enable realization of a circuit in a field programmable analog array (FPAA), comprising:

programming a programmable computer with instructions comprising sub-circuit definitions that enable a user via a user interface of the programmable computer to define a configuration of circuit components to realize a sub-circuit in an FPAA; and

via a user interface, defining a specific configuration of circuit components that will realize a sub-circuit in an FPAA.

46. The method of claim 45 further comprising defining a topology of the corresponding sub-circuit.

47. The method of claim 46 further comprising defining a parameter of the sub-circuit.

48. The method of claim 47 further comprising controlling the user interface with the instructions.

49. The method of claim 45 further comprising providing user selections via the user interface to modify configuration of the sub-circuit.

50. The method of claim 45 wherein defining a configuration comprises wiring together circuit components to form one of a sub-circuit and a circuit.

51. The method of claim 45 further comprising assembling the circuit components into a circuit design for a field programmable analog array (FPAA).