Amplitude converting circuit

• US 20040041614A1
• Filed: 06/12/2003
• Published: 03/04/2004
• Est. Priority Date: 02/26/2002
• Status: Active Grant

• Current Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Original Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Inventors: Tobita, Youichi
• Granted Patent: US 6,861,889 B2
• Time in Patent Office: Days
• US Class Current: 327/333
• CPC Class Codes: G09G 2310/0289 Details of voltage level shifters arranged for use in a driving circuit
• CPC Class Codes: H03K 17/063 in field-effect transistor switches
• CPC Class Codes: H03K 3/356113 using additional transistors in the input circuit

Abstract

A level shifter (3) includes first and second P type TFTs (5, 6) and first and second N type TFTs (7, 8) for latching levels of first and second output nodes (N5, N6), third and fourth N type TFTs (9, 10) for setting levels of the first and second output nodes (N5, N6), and first and second resistance elements (11, 12) and first and second capacitors (13, 14) for applying between gate-source of the third and fourth N type TFTs (9, 10) a voltage (about 6V) higher than an amplitude voltage (3V) of an input signal (VI) in response to rising and falling edges of the input signal (VI), respectively.

Claims

1. An amplitude converting circuit converting a first signal (VI) of which amplitude is a first voltage (3V) to a second signal (VO) of which amplitude is a second voltage (7.5V) higher than said first voltage (3V), comprising:

first and second transistors (5,6) of a first conductivity type, receiving at both of their first electrodes the second voltage (7.5V) and having their second electrodes connected to first and second output nodes (N5, N6) for outputting the second signal (VO) and a complementary signal (/VO), respectively, and their input electrodes connected to said second and first output nodes (N6, N5), respectively;

third and fourth transistors (9, 10) of a second conductivity type having their first electrodes connected to said first and second output nodes (N5, N6), respectively; and

a driving circuit (11˜

14, 21, 22, 26, 27, 31˜

34, 36, 37, 41˜

44) driven by said first signal (VI) and a complementary signal (/VI), applying a third voltage higher than said first voltage (3V) between the input electrode and a second electrode of said third transistor (9) in response to a leading edge of said first signal (VI) to render conductive said third transistor (9), and applying said third voltage between the input electrode and a second electrode of said fourth transistor (10) in response to a trailing edge of said first signal (VI) to render conductive said fourth transistor (10).

2. The amplitude converting circuit according to claim 1, wherein

said driving circuit (11˜

14, 21, 22, 26, 27, 31˜

34, 36, 37, 41˜

44) includes

a first resistance element (11, 21, 36) connected between the input electrode and the second electrode of said third transistor (9),

a first capacitor (13) having one electrode receiving the complementary signal (/VI) of the first signal (VI) and the other electrode connected to the input electrode of said third transistor (9),

a second resistance element(12, 22, 37) connected between the input electrode and the second electrode of said fourth transistor (10), and

a second capacitor (14) having one electrode receiving said first signal (VI) and the other electrode connected to the input electrode of said fourth transistor (10), and

applies said first signal (VI) and the complementary signal (/VI) to the second electrodes of said third and fourth transistors (9, 10) respectively.

3. The amplitude converting circuit according to claim 2, wherein

said first resistance element (11, 21, 36) includes a fifth transistor (21, 36) connected to the input electrode and the second electrode of said third transistor (9) and receiving at an input electrode a fourth voltage;

and

said second resistance element (12, 22, 37) includes a sixth transistor (22, 37) connected between the input electrode and the second electrode of said fourth transistor (10) and receiving at an input electrode said fourth voltage.

4. The amplitude converting circuit according to claim 3, wherein

said fifth and sixth transistors (21, 22) are of the second conductivity type;

and

said fourth voltage is equal to said second voltage (7.5V).

5. The amplitude converting circuit according to claim 2, wherein

said first resistance element (11, 21, 36) includes a fifth transistor (21, 36) connected between the input electrode and the second electrode of said third transistor (9);

said second resistance element (12, 22, 37) includes a sixth transistor (22, 37) connected between the input electrode and the second electrode of said fourth transistor (10); and

said driving circuit (11˜

14, 21, 22, 26, 27, 31˜

34, 36, 37, 41˜

44) further includes a pulse generating circuit (31˜

34) raising pulse-wise resistance value of said fifth transistor (21, 36) in response to a leading edge of said first signal (VI) and raising pulse-wise resistance value of said sixth transistor (22, 37) in response to a trailing edge of said first signal (VI).

6. The amplitude converting circuit according to claim 5, wherein

said fifth and sixth transistors (21, 22) are of the second conductivity type;

and

said pulse generating circuit (31˜

34) includes

a third resistance element (31) connected between a node of a fourth voltage of the same polarity as said second voltage (7.5V) and the input electrode of said fifth transistor (21),

a third capacitor (33) having one electrode receiving said first signal (VI) and the other electrode connected to the input electrode of said fifth transistor (21),

a fourth resistance element (32) connected between said node of the fourth voltage and the input electrode of the sixth transistor (22), and

a fourth capacitor (34) having one electrode receiving the complementary signal (/VI) of the first signal (VI) and the other electrode connected to the input electrode of the sixth transistor (22).

7. The amplitude converting circuit according to claim 6, wherein

said fourth voltage is equal to said second voltage (7.5V).

8. The amplitude converting circuit according to claim 5, wherein

said fifth and sixth transistors (36, 27) are of the first conductivity type;

and

said pulse generating circuit (31˜

34) includes

a third resistance element (31) connected between a node of a fourth voltage (−

7.5V) of a polarity opposite to that of the second voltage (7.5V) and the input electrode of said fifth transistor (36),

a third capacitor (33) having one electrode receiving the complementary signal (/VI) of said first signal (VI) and the other electrode connected to the input electrode of said fifth transistor (36),

a fourth resistance element (32) connected between the node of said fourth voltage (−

7.5V) and the input electrode of said sixth transistor (37), and

a fourth capacitor (34) having one electrode receiving said first signal (VI) and the other electrode connected to the input electrode of said sixth transistor (37).

9. The amplitude converting circuit according to claim 2, wherein

said driving circuit (11˜

14, 21, 22, 26, 27, 31˜

34, 36, 37, 41˜

44) further includes

a first diode element (26) connected between the second electrode and the input electrode of said third transistor (9), and

a second diode element (27) connected between the second electrode and the input electrode of said fourth transistor (10).

10. The amplitude converting circuit according to claim 1, wherein

said driving circuit (11˜

14, 21, 22, 26, 27, 31˜

34, 36, 37, 41˜

44) includes

a first resistance element (41, 21) connected between the second electrode of said third transistor (9) and a node of a reference voltage (GND),

a first capacitor (43) having one electrode receiving said first signal (VI) and the other electrode connected to the second electrode of said third transistor (9),

a second resistance element (42, 22) connected between the second electrode of said fourth transistor (10) and the node of said reference voltage (GND), and

a second capacitor (44) having one electrode receiving the complementary signal (/VI) of said first signal (VI) and the other electrode connected to the second electrode of said fourth transistor (10), and

applies said first signal (VI) and the complementary signal (/VI) to the input electrodes of said fourth and third transistors (10, 9), respectively.

11. The amplitude converting circuit according to claim 10, wherein

said first resistance element (41, 21) includes a fifth transistor (21) connected between the second electrode of said third transistor (9) and the node of said reference voltage (GND);

said second resistance element (42, 22) includes a sixth transistor (22) connected between the second electrode of said fourth transistor (10) and the node of said reference voltage (GND); and

said driving circuit (11˜

14, 21, 22, 26, 27, 31˜

34, 36, 37, 41˜

44) further includes a pulse generating circuit (31˜

34) raising pulse-wise resistance value of said fifth transistor (21) in response to a leading edge of said first signal (VI) and raising pulse-wise resistance value of said sixth transistor (22) in response to a trailing edge of said first signal (VI).

12. The amplitude converting circuit according to claim 11, wherein

said fifth and sixth transistors (21, 22) are of the second conductivity type;

and

said pulse generating circuit (31˜

34) includes

a third resistance element (31) connected between a node of a fourth voltage of the same polarity as said second voltage (7.5V) and the input electrode of said fifth transistor (21),

a third capacitor (33) having one electrode receiving said first signal (VI) and the other electrode connected to the input electrode of said fifth transistor (21),

a fourth resistance element (32) connected between the node of the fourth voltage and the input electrode of the sixth transistor (22), and

a fourth capacitor (34) having one electrode receiving the complementary signal (/VI) of the first signal (VI) and the other electrode connected to the input electrode of the sixth transistor (22).

13. The amplitude converting circuit according to claim 12, wherein

said fourth voltage is equal to said second voltage (7.5V).

14. The amplitude converting circuit according to claim 1, further comprising

a latch circuit (7, 8) for latching potentials of said first and second output nodes (N5, N6).

15. The amplitude converting circuit according to claim 14, wherein

said latch circuit (7, 8) includes fifth and sixth transistors (7, 8) of the second conductivity type, having their first electrodes connected to said first and second output nodes (N5, N6), their second electrodes receiving said first signal (VI) and a complementary signal (/VI), and their input electrodes connected to said second and first output nodes (N6, N5), respectively.

16. The amplitude converting circuit according to claim 14, wherein

said latch circuit (7, 8) includes fifth and sixth transistors (7, 8) of the second conductivity type, connected between said first and second output nodes (N5, N6) and a node of a reference potential (GND), respectively, and having their input electrodes connected to said second and first output nodes (N6, N5), respectively.

17. The amplitude converting circuit according to claim 1, further comprising:

a fifth transistor (16) of the first conductivity type inserted between the second electrode of said first transistor (5) and said first output node (N5) and having an input electrode connected to the input electrode of said third transistor (9); and

a sixth transistor (17) of the first conductivity type inserted between the second electrode of said second transistor (6) and said second output node (N6) and having an input electrode connected to the input electrode of said fourth transistor (10).

18. The amplitude converting circuit according to claim 1, wherein

said first to fourth transistors (5, 6, 9,10) are thin film transistors.